MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 93

• Manufacturer Part Number: MMC2107CFCAG33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2107
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 72
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: Mcore
• Device Core: MCORE
• Device Core Size: 32b
• Frequency (max): 33MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 72
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 3.6/5.5V
• Operating Supply Voltage (min): 2.7/4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.7 Memory Map and Registers
3.7.1 Programming Model
MMC2107 – Rev. 2.0
MOTOROLA
This subsection provides a description of the memory map and registers.
The CCM programming model consists of these registers:
Some control register bits are implemented as write-once bits. These
bits are always readable, but once the bit has been written, additional
writes have no effect, except during debug mode and test operations.
Some write-once bits and test bits can be read and written while in debug
mode or test mode. When debug or test mode is exited, the chip
configuration module resumes operation based on the current register
values. If a write to a write-once register bit occurs while in debug or test
mode, the register bit remains writable on exit from debug or test mode.
Table 3-2
All configurations
Debug operation (all modes)
Test operation (all modes)
Master mode
Single-chip mode
FAST mode
Emulation mode
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Freescale Semiconductor, Inc.
For More Information On This Product,
The chip configuration register (CCR) controls the main chip
configuration.
The reset configuration register (RCON) indicates the default chip
configuration.
The chip identification register (CIR) contains a unique part
number.
The chip test register (CTR) contains chip-specific test functions.
Table 3-2. Write-Once Bits Read/Write Accessibility
Chip Configuration Module (CCM)
shows the accessibility of write-once bits.
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Configuration
Read-always
Write-always
Write-always
Write-once
Write-once
Write-once
Write-once
Chip Configuration Module (CCM)
Read/Write Access
Memory Map and Registers
Technical Data
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