MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 201

• Manufacturer Part Number: MMC2107CFCAG33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2107
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 72
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: Mcore
• Device Core: MCORE
• Device Core Size: 32b
• Frequency (max): 33MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 72
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 3.6/5.5V
• Operating Supply Voltage (min): 2.7/4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
BLOCK[7:0] — Block Program and Erase Field
RSVD6 — Reserved
ERASE — Program or Erase Select Bit
SES — Start/End Sequence Bit
SES does not lock the SCLKR[2:0], CLKPE[1:0], and CLKPM[6:0] bits.
Do not change these bits in software when SES = 1 unless
PAWS[2] = 1.
The read/write BLOCK[7:0] field selects array blocks for program or
erase operation. BLOCK[7:0] is writable when the SES bit is clear. If
SES is written in the same cycle with BLOCK[7:0] bits, the write
permission to BLOCK[7:0] bits depends on the previous value of SES.
Up to eight blocks at once can be selected for program operation.
Array blocks that correspond to 1s in BLOCK[7:0] are selected for
program or erase operation. The BLOCK[7:0] default state is $00, not
selected for program or erase.
Reserved for test purposes. Writing to this read/write bit updates the
values and could affect functionality if set to 1.
The read-always ERASE bit selects program or erase operations.
ERASE is writable when the SES bit is clear. If SES and ERASE are
written in the same cycle, the write permission to ERASE bit depends
on the previous value of SES.
When ERASE = 0, the array is configured for programming, and if
SES = 1 the SIE bit is write locked. When ERASE = 1, the array is
configured for erasing, and SES does not write lock the SIE bit.
The read-always SES bit signals the start and end of a program or
erase sequence. SES is writable when the HVS and EHV bits are
clear. If SES and EHV are written in the same cycle, the write
permission to SES depends on the previous value of EHV. At the start
of a program or erase sequence, SES is set, locking PROTECT[7:0],
BLOCK[7:0], and ERASE.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Array block selected for program or erase
0 = Array block not selected for program or erase
1 = Erase operation
0 = Program operation
1 = CMFR configured for program or erase operation
0 = CMFR not configured for program or erase operation
Non-Volatile Memory FLASH (CMFR)
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Non-Volatile Memory FLASH (CMFR)
Registers and Memory Map
Technical Data
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