MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 215

• Manufacturer Part Number: MMC2107CFCAG33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2107
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 72
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: Mcore
• Device Core: MCORE
• Device Core Size: 32b
• Frequency (max): 33MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 72
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 3.6/5.5V
• Operating Supply Voltage (min): 2.7/4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.8.5.1 Erase Sequence
MMC2107 – Rev. 2.0
MOTOROLA
Use this sequence to enable the high voltage to the array or shadow
information for erase operation:
10. Make sure that CMFRMTR is in its reset state.
1. Make sure that CMFRMTR is in its reset state, and write
2. In CMFRMCR, write PROTECT[7:0] to disable protection of the
3. Use the procedure in
4. Execute an erase interlock write to any array location.
5. In CMFRCTL, write EHV = 1.
6. Read CMFRCTL until HVS = 0.
7. In CMFRCTL, write EHV = 0.
8. Verify the erase by reading all locations that are being erased,
9. In CMFRCTL, write SES = 0.
Freescale Semiconductor, Inc.
For More Information On This Product,
PAWS[2:0] = 111 to override firmware amplitude modulation.
blocks to be erased.
control fields for an erase pulse with BLOCK[7:0] selecting the
blocks to be erased and ERASE = SES = 1 in CMFRCTL.
including the shadow information if the block that contains it is
erased. Off-page reads are erase margin reads that update the
read page buffer. If all the locations read as erased, continue to
the next step otherwise, update PAWS and NVR (if required, see
Table
To reduce the time for verification, upon the first read of a 0, go to
step 5. After a location has been verified (all bits are erased), it is
not necessary to reverify locations after subsequent erase pulses.
Non-Volatile Memory FLASH (CMFR)
Go to: www.freescale.com
9-9). Then go back to step 5.
Table 9-6
to write the pulse-width timing
Non-Volatile Memory FLASH (CMFR)
Functional Description
Technical Data
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