DS80C390-QCR+ Maxim Integrated Products, DS80C390-QCR+ Datasheet - Page 50

• Manufacturer Part Number: DS80C390-QCR+
• Description: IC MPU CAN DUAL HS 68-PLCC
• Manufacturer: Maxim Integrated Products
• Series: 80Cr

Specifications of DS80C390-QCR+

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.85 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-LCC, 68-PLCC
• Processor Series: DS80C390
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Size: 4 KB
• Data Ram Size: 4 KB
• Interface Type: CAN, IrDA
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 3.85 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Package: 68PLCC
• Device Core: 8051
• Family Name: 80C
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Table 14. Arbitration/Masking Feature Summary
11-Bit Arbitration
29-Bit Arbitration
Message Center
Message Center
Arbitration (CAN
Arbitration (CAN
Extended 29-Bit
Standard 11-Bit
15, Extended
TEST NAME
15, Standard
(CAN 2.0A)
(CAN 2.0B)
Media Byte
Arbitration
2.0A)
2.0B)
Arbitration Registers 0–1
Arbitration Registers 0–3
Arbitration Registers 0–1
Arbitration Registers 0–3
Message Center, MOVX
Message Center, MOVX
(Located in each CAN
Register bank, MOVX
(Located in Message
(Located in Message
Control/Status/Mask
Message Center 15
Message Center 15
Center 15, MOVX
Center 15, MOVX
Media Arbitration
Message Center
(Located in each
Message Center
(Located in each
ARBITRATION
Registers 0–3
REGISTERS
memory)
memory)
memory)
memory)
memory)
Message Center 15 Mask
Message Center 15 Mask
Media ID Mask Registers
Extended Global Mask
Standard Global Mask
(Located in each CAN
(Located in each CAN
(Located in each CAN
(Located in each CAN
(Located in each CAN
Register bank, MOVX
Register bank, MOVX
Register bank, MOVX
Register bank, MOVX
Register bank, MOVX
MASK REGISTERS
Control/Status/Mask
Control/Status/Mask
Control/Status/Mask
Control/Status/Mask
Control/Status/Mask
Registers 0–1
Registers 0–3
Registers 0–1
Registers 0–3
memory)
memory)
memory)
memory)
memory)
50 of 53
0–1
EX/ST = 0
MEME = 0: Mask register ignored. ID and
arbitration register must match exactly.
MEME = 1: Only bits corresponding to 1 in mask
register are compared in ID and arbitration
registers.
EX/ST = 1
MEME = 0: Mask register ignored. ID and
arbitration register must match exactly.
MEME = 1: Only bits corresponding to 1 in mask
register are compared in ID and arbitration
registers.
MDME = 0: Media byte arbitration disabled.
MDME = 1: Only bits corresponding to 1 in
Media ID mask register are compared between
data bytes 1 and 2 and Media arbitration
registers.
EX/ST = 0
MEME = 0: Mask register ignored. ID and
arbitration register must match exactly.
MEME = 1: Message center 15 mask registers
are ANDed with Global Mask register. Only bits
corresponding to 1 in resulting value are
compared in ID and arbitration registers.
EX/ST = 1
MEME = 0: Mask register ignored. ID and
arbitration register must match exactly.
MEME = 1: Message center 15 mask registers
are ANDed with Global Mask register. Only bits
corresponding to 1 in resulting value are
compared in ID and arbitration registers.
CONTROL BITS AND CONDITIONS