DS80C390-QCR+ Maxim Integrated Products, DS80C390-QCR+ Datasheet - Page 46

• Manufacturer Part Number: DS80C390-QCR+
• Description: IC MPU CAN DUAL HS 68-PLCC
• Manufacturer: Maxim Integrated Products
• Series: 80Cr

Specifications of DS80C390-QCR+

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.85 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-LCC, 68-PLCC
• Processor Series: DS80C390
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Size: 4 KB
• Data Ram Size: 4 KB
• Interface Type: CAN, IrDA
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 3.85 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Package: 68PLCC
• Device Core: 8051
• Family Name: 80C
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

COMMUNICATING WITH THE CAN MODULE
The microcontroller interface to the CAN modules is divided into two groups of registers. All the global CAN status
and control bits as well as the individual message center control/status registers are located in the SFR map. The
remaining registers associated with the message centers (data identification, identification/arbitration masks,
format, and data) are located in MOVX data space. The CMA bit (MCON.5) allows the message centers to be
mapped to either 00EE00h–00EEFFh (CMA = 0) or 401000h–4011FFh (CMA = 1), reducing the possibility of a
memory conflict with application software. Note that setting the CMA bit employs a special 23rd address bit that is
only used for addressing CAN MOVX memory. The DS80C390’s internal architecture requires that the device be in
one of the two 22-bit addressing modes when the CMA bit is set to correctly use the 23rd bit and access the CAN
MOVX memory. A special lockout feature prevents the accidental software corruption of the control, status, and
mask registers while a CAN operation is in progress. Each CAN processor uses 15 message centers. Each
message center is composed of four specific areas, including the following:
1) Four arbitration registers (C0MxAR0–3 and C1MxAR0–3) that store either the 11-bit or 29-bit arbitration value.
2) A format register (C0MxF and C1MxF) that informs the CAN processor as to the direction (transmit or receive),
3) Eight data bytes for storage of 0 to 8 bytes of data (C0MxD0–7 and C1MxD0–7), which are located in the
4) Message control registers (C0MxC and C1MxC), which are located in the SFR memory for fast access.
Each of the message centers is identical with the exception of message center 15. Message center 15 has been
designed as a receive-only center, and is also buffered through the use of a two-message FIFO to help prevent
message loss in a message-overrun situation. The receipt of a third message before either of the first two are read
will overwrite the second message, leaving the first message undisturbed.
Modification of the CAN registers located in MOVX memory is protected through the SWINT bits, with one bit
protecting each respective CAN module. Consult the description of this bit in the High-Speed Microcontroller User’s
Guide: DS80C390 Supplement for more information. Each CAN module contains a block of control/status/mask
registers, 14 functionally identical message centers, plus a 15th message center that is receive-only and
incorporates a buffered FIFO. The following tables describe the organization of the message centers located in
MOVX space.
These registers are located in the MOVX memory map.
the number of data bytes in the message, the identification format (standard or extended), and the optional use
of the identification mask or media mask during message evaluation. This register is located in the MOVX
memory map.
MOVX memory map.
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