DS80C390-QCR+ Maxim Integrated Products, DS80C390-QCR+ Datasheet - Page 27

IC MPU CAN DUAL HS 68-PLCC

DS80C390-QCR+

Manufacturer Part Number
DS80C390-QCR+
Description
IC MPU CAN DUAL HS 68-PLCC
Manufacturer
Maxim Integrated Products
Series
80Cr
Datasheet

Specifications of DS80C390-QCR+

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SIO, UART/USART
Peripherals
Power-Fail Reset, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3.85 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-LCC, 68-PLCC
Processor Series
DS80C390
Core
8051
Data Bus Width
8 bit
Program Memory Size
4 KB
Data Ram Size
4 KB
Interface Type
CAN, IrDA
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
3.85 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Package
68PLCC
Device Core
8051
Family Name
80C
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
PIN DESCRIPTION (continued)
34–27
21–14
LQFP
34
33
32
31
30
29
28
27
21
20
19
18
17
16
15
14
PIN
9, 26, 43,
45, 44,
31–27,
PLCC
42–37
25–23
45
44
42
41
40
39
38
37
31
30
29
28
27
25
24
23
60
P4.0–P4.7
P5.0–P5.7
NAME
N.C.
Port 4, I/O. Port 4 can function as an 8-bit, bidirectional I/O port, and
as the source for external address and chip enable signals for
program and data memory. Port pins are configured as I/O or
memory signals via the P4CNT register. The reset condition of Port 1
is all bits at logic 1 via a weak pullup. The logic 1 state also serves as
an input mode, since external circuits writing to the port can overdrive
the weak pullup. When software clears any port pin to 0, the device
activates a strong pulldown that remains on until either a 1 is written
to the port pin or a reset occurs. Writing a 1 after the port has been at
0 will activate a strong transition driver, followed by a weaker
sustaining pullup. Once the momentary strong driver turns off, the
port once again becomes the output (and input) high state.
Port
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
Port 5, I/O. Port 5 can function as an 8-bit, bidirectional I/O port, the
CAN interface, or as peripheral enable signals. Setting the SP1EC bit
will relocate the RXD1 and TXD1 functions to P5.3-P5.2 as described
in the High-Speed Microcontroller User’s Guide: DS80C390
Supplement. The reset condition of Port 1 is all bits at logic 1 via a
weak pullup. The logic 1 state also serves as an input mode, since
external circuits writing to the port can overdrive the weak pullup.
When software clears any port pin to 0, the device activates a strong
pulldown that remains on until either a 1 is written to the port pin or a
reset occurs. Writing a 1 after the port has been at 0 will activate a
strong transition driver, followed by a weaker sustaining pullup. Once
the momentary strong driver turns off, the port once again becomes
the output (and input) high state.
Port
P5.0
P5.1
P5.2
P5.3
P5.4
P5.5
P5.6
P5.7
Not Connected. Reserved. These pins are reserved for use with
future devices in this family and should not be connected.
Alternate Function
CE0 Program Memory Chip Enable 0
CE1 Program Memory Chip Enable 1
CE2 Program Memory Chip Enable 2
CE3 Program Memory Chip Enable 3
A16 Program/Data Memory Address 16
A17 Program/Data Memory Address 17
A18 Program/Data Memory Address 18
A19 Program/Data Memory Address 19
Alternate Function
C0TX CAN0 Transmit Output
C0RX CAN0 Receive Input
C1RX CAN1 Receive Input (optional RXD1)
C1TX CAN1 Transmit Output (optional TXD1)
PCE0 Peripheral Chip Enable 0
PCE1 Peripheral Chip Enable 1
PCE2 Peripheral Chip Enable 2
PCE3 Peripheral Chip Enable 3
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FUNCTION

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