DF2378BVFQ35WV Renesas Electronics America, DF2378BVFQ35WV Datasheet - Page 712

IC H8S/2378 MCU FLASH 144-QFP

DF2378BVFQ35WV

Manufacturer Part Number
DF2378BVFQ35WV
Description
IC H8S/2378 MCU FLASH 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2378BVFQ35WV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
35MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-QFP
For Use With
EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2378BVFQ35WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 12 Programmable Pulse Generator (PPG)
12.4.3
Figure 12.5 shows an example in which pulse output is used for cyclic five-phase pulse output.
1. Set up TGRA in TPU which is used as the output trigger to be an output compare register. Set
2. Write H'F8 in P1DDR and NDERH, and set the G3CMS1, G3CMS0, G2CMS1, and G2CMS0
3. The timer counter in the TPU channel starts. When compare match A occurs, the NDRH
4. Five-phase pulse output (one or two phases active at a time) can be obtained subsequently by
Rev.7.00 Mar. 18, 2009 page 644 of 1136
REJ09B0109-0700
TGRA
H'0000
NDRH
PODRH
PO15
PO14
PO13
PO11
TCNT value
PO12
a cycle in TGRA so the counter will be cleared by compare match A. Set the TGIEA bit in
TIER to 1 to enable the compare match/input capture A (TGIA) interrupt.
bits in PCR to select compare match in the TPU channel set up in the previous step to be the
output trigger. Write output data H'80 in NDRH.
contents are transferred to PODRH and output. The TGIA interrupt handling routine writes the
next output data (H'C0) in NDRH.
writing H'40, H'60, H'20, H'30, H'10, H'18, H'08, H'88... at successive TGIA interrupts.
If the DTC or DMAC is set for activation by the TGIA interrupt, pulse output can be obtained
without imposing a load on the CPU.
Example of Normal Pulse Output (Example of Five-Phase Pulse Output)
Figure 12.5 Normal Pulse Output Example (Five-Phase Pulse Output)
00
80
TCNT
80
C0
C0
40
40
60
Compare match
60
20
20
30
30
10
10
18
18
08
08
88
88
80
80
C0
C0
40
Time

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