EP9312-IBZ Cirrus Logic Inc, EP9312-IBZ Datasheet - Page 771

• Manufacturer Part Number: EP9312-IBZ
• Description: IC ARM920T MCU 200MHZ 352-PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-IBZ

• Core Size: 16/32-Bit
• Package / Case: 352-BGA
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Controller Family/series: (ARM9)
• A/d Converter: 12 Bits
• No. Of I/o Pins: 65
• Clock Frequency: 200MHz
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1260

DS785UM1
27.1 Introduction
27.2 Theory of Operation
The IDE interface provides an industry standard connection to ATA/ATAPI compliant devices.
A single IDE port is provided which will attach to master or slave devices. The interface will
support up to:
The IDE block will use the internal DMA controller to do the data transfers in Multiword DMA
and Ultra DMA modes. The interface will support only 16 bit devices. The data transfer is
always 16-bit wide, even for a non-data transfer in PIO mode, when only the lower 8 bits are
valid.
The IDE host has one request line, DMAide to the DMA controller, used to request DMA
service. It has an external interrupt line, INTRQ, from the device for interrupt service. It also
has an internally generated interrupt signal INTide for reporting internal errors in the IDE host
to the ARM Core.
The IDE port is connected to the external ATAPI device through a 28-pin interface. Of these
28 signals, 25 use dedicated pins, 2 share
EGPIO[15] for DASPn), and the device interrupt request uses one of the
INTRQ.
The IDE interface hardware is composed of several elements: a GPIO like Pin Interface, a
MDMA Transfer State Machine, a UDMA Transfer State Machine, a pair of Read and Write
Data Buffer FIFOs, and a pair of CRC generation circuits.
The interface between the IDE host and the IDE device is defined in
labeled Type identifies the block associated with the processor pin. The GPIO type indicates
the 2 pins that are shared with the EGPIO block. The INT type indicates the pin using one of
the
dedicated pins.
Note: This chapter applies only to the EP9312 and EP9315 processors.
• 2 Devices
• PIO Mode 4
• Multi-word DMA Mode 2
• Ultra DMA Mode 4
INT
pins. The NI type indicates an IDE signal that is not supported. All others are
Copyright 2007 Cirrus Logic
EGPIO
pins (EGPIO[2] for DMARQ and
27IDE Interface
Table
INT
Chapter 27
27-1. The column
pins (INT[3]) for
27-1
27