SAK-C505CA-4EM CA Infineon Technologies, SAK-C505CA-4EM CA Datasheet - Page 72

IC MCU 8BIT 32KB OTP MQFP-44-2

SAK-C505CA-4EM CA

Manufacturer Part Number
SAK-C505CA-4EM CA
Description
IC MCU 8BIT 32KB OTP MQFP-44-2
Manufacturer
Infineon Technologies
Series
C5xx/C8xxr
Datasheet

Specifications of SAK-C505CA-4EM CA

Core Processor
C500
Core Size
8-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
4.25 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-BQFP
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
CAN, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
34
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Packages
PG-MQFP-44
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
1.25 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
32.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
K505CA4EMCANP
K505CA4EMCAXT
SAK-C505CA-4EMCA
SAK-C505CA-4EMCAINTR
SAK-C505CA-4EMCATR
SAK-C505CA-4EMCATR
SAKC505CA4EMCAXT
SP000106397
AC Characteristics (16 MHz, 0.4 to 0.6 Duty Cycle)
(Operating Conditions apply)
(
Program Memory Characteristics
Parameter
ALE pulse width
Address setup to ALE
Address hold after ALE
ALE to valid instruction in
ALE to PSEN
PSEN pulse width
PSEN to valid instruction in
Input instruction hold after PSEN
Input instruction float after PSEN
Address valid after PSEN
Address to valid instruction in
Address float to PSEN
*)
Data Sheet
C
L
Interfacing the C505 to devices with float times up to 20 ns is permissible. This limited bus contention will not
cause any damage to port 0 drivers.
for port 0, ALE and PSEN outputs = 100 pF;
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
LHLL
AVLL
LLAX
LLIV
LLPL
PLPH
PLIV
PXIX
PXIZ
PXAV
AVIV
AZPL
*)
*)
68
min.
48
10
10
10
73
0
20
-5
16-MHz clock
C
Duty Cycle
L
0.4 to 0.6
for all other outputs = 80 pF)
max.
75
38
15
95
C505/C505C/C505A/C505CA
Limit Values
min.
CLP - 15
TCL
TCL
TCL
CLP+
TCL
0
TCL
-5
1/CLP= 2 MHz to 16 MHz
Hmin
Hmin
Lmin
Hmin
Lmin
Variable Clock
-15
- 5
-15 –
-15
-15 –
max.
2 CLP - 50
CLP+
TCL
TCL
2 CLP +
TCL
Hmin
Lmin
Hmin
- 50
-10
-55
12.00
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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