SAK-C505CA-4EM CA Infineon Technologies, SAK-C505CA-4EM CA Datasheet - Page 13

• Manufacturer Part Number: SAK-C505CA-4EM CA
• Description: IC MCU 8BIT 32KB OTP MQFP-44-2
• Manufacturer: Infineon Technologies
• Series: C5xx/C8xxr

Specifications of SAK-C505CA-4EM CA

• Core Processor: C500
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 4.25 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-BQFP
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: CAN, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Packages: PG-MQFP-44
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 1.25 KByte
• Can Nodes: 1
• A / D Input Lines (incl. Fadc): 8
• Program Memory: 32.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: K505CA4EMCANP; K505CA4EMCAXT; SAK-C505CA-4EMCA; SAK-C505CA-4EMCAINTR; SAK-C505CA-4EMCATR; SAK-C505CA-4EMCATR; SAKC505CA4EMCAXT; SP000106397

Table 2
Pin Definitions and Functions (cont’d)
Symbol
P2.0-P2.7
PSEN
ALE
*) I = Input
Data Sheet
O = Output
18-25
26
27
Pin Number
I/O
*)
I/O
O
O
Function
Port 2
is a an 8-bit quasi-bidirectional I/O port with internal pullup
resistors. Port 2 pins that have 1’s written to them are pulled
high by the internal pullup resistors, and in that state can be
used as inputs. As inputs, port 2 pins being externally pulled
low will source current (I
because of the internal pullup resistors. Port 2 emits the
high-order address byte during fetches from external
program memory and during accesses to external data
memory that use 16-bit addresses (MOVX @DPTR). In this
application it uses strong internal pullup transistors when
issuing 1s. During accesses to external data memory that
use 8-bit addresses (MOVX @Ri), port 2 issues the
contents of the P2 special function register and uses only
the internal pullup resistors.
The Program Store Enable
output is a control signal that enables the external program
memory to the bus during external fetch operations. It is
activated every three oscillator periods except during
external data memory accesses. Remains high during
internal program execution. This pin should not be driven
during reset operation.
The Address Latch Enable
output is used for latching the low-byte of the address into
external memory during normal operation. It is activated
every three oscillator periods except during an external data
memory access. When instructions are executed from
internal ROM or OTP (EA=1) the ALE generation can be
disabled by bit EALE in SFR SYSCON.
ALE should not be driven during reset operation.
9
C505/C505C/C505A/C505CA
IL
, in the DC characteristics)
12.00