SAK-C505CA-4EM CA Infineon Technologies, SAK-C505CA-4EM CA Datasheet - Page 10

• Manufacturer Part Number: SAK-C505CA-4EM CA
• Description: IC MCU 8BIT 32KB OTP MQFP-44-2
• Manufacturer: Infineon Technologies
• Series: C5xx/C8xxr

Specifications of SAK-C505CA-4EM CA

• Core Processor: C500
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 4.25 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-BQFP
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: CAN, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Packages: PG-MQFP-44
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 1.25 KByte
• Can Nodes: 1
• A / D Input Lines (incl. Fadc): 8
• Program Memory: 32.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: K505CA4EMCANP; K505CA4EMCAXT; SAK-C505CA-4EMCA; SAK-C505CA-4EMCAINTR; SAK-C505CA-4EMCATR; SAK-C505CA-4EMCATR; SAKC505CA4EMCAXT; SP000106397

Table 2
Pin Definitions and Functions
Symbol
P1.0-P1.7
*) I = Input
Data Sheet
O = Output
40-44,1-3
40
41
42
43
44
1
2
3
Pin Number
I/O
*)
I/O
Function
Port 1
is an 8-bit quasi-bidirectional port with internal pull-up
arrangement. Port 1 pins can be used for digital input/output
or as analog inputs of the A/D converter. Port 1 pins that
have 1’s written to them are pulled high by internal pull-up
transistors and in that state can be used as inputs. As
inputs, port 1 pins being externally pulled low will source
current (I
internal pullup transistors. Port 1 pins are assigned to be
used as analog inputs via the register P1ANA.
As secondary digital functions, port 1 contains the interrupt,
timer, clock, capture and compare pins. The output latch
c o r r e s p o n d i n g t o a s e c o n d a r y f u n c t i o n m u s t b e
programmed to a one (1) for that function to operate (except
for compare functions). The secondary functions are
assigned to the pins of port 1 as follows:
P1.0 / AN0 / INT3 / CC0 Analog input channel 0
P1.1 / AN1 / INT4 / CC1 Analog input channel 1/
P1.2 / AN2 / INT5 / CC2 Analog input channel 2 /
P1.3 / AN3 / INT6 / CC3 Analog input channel 3
P1.4 / AN4
P1.5 / AN5 / T2EX
P1.6 / AN6 / CLKOUT
P1.7 / AN7 / T2
Port 1 is used for the low-order address byte during program
verification of the C505 ROM versions (i.e. C505(C)(A)-2R/
C505A-4R/C505CA-4R).
IL
6
, in the DC characteristics) because of the
C505/C505C/C505A/C505CA
interrupt 3 input /
capture/compare channel 0 I/O
interrupt 4 input /
capture/compare channel 1 I/O
interrupt 5 input /
capture/compare channel 2 I/O
interrupt 6 input /
capture/compare channel 3 I/O
Analog input channel 4
Analog input channel 5 / Timer 2
external reload / trigger input
Analog input channel 6 /
system clock output
Analog input channel 7 /
counter 2 input
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