DF2398TE20V Renesas Electronics America, DF2398TE20V Datasheet - Page 695
![IC H8S MCU FLASH 256K 120TQFP](/photos/12/21/122170/df2398te20v_sml.jpg)
DF2398TE20V
Manufacturer Part Number
DF2398TE20V
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2398TE20V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 695 of 1049
- Download datasheet (5Mb)
Table 20-4 and figure 20-6 show the input conditions for the external clock.
Table 20-4 External Clock Input Conditions
20.4
When the oscillator frequency is 5 MHz or higher, the duty adjustment circuit adjusts the duty cycle of the clock signal
from the oscillator to generate the system clock (ø).
20.5
The medium-speed clock divider divides the system clock to generate ø/2, ø/4, ø/8, ø/16, and ø/32.
20.6
The bus master clock selection circuit selects the system clock (ø) or one of the medium-speed clocks (ø/2, ø/4, or ø/8,
ø/16, and ø/32) to be supplied to the bus master, according to the settings of the SCK2 to SCK0 bits in SCKCR.
Duty Adjustment Circuit
Medium-Speed Clock Divider
Bus Master Clock Selection Circuit
Item
External clock input
low pulse width
External clock input
high pulse width
External clock rise time
External clock fall time
Clock low pulse width
level
Clock high pulse width
level
EXTAL
t
EXr
Symbol
t
t
t
t
t
t
EXL
EXH
EXr
EXf
CL
CH
Figure 20-6 External Clock Input Timing
V
to 5.5 V
Min
40
40
—
—
0.4
80
0.4
80
CC
t
= 2.7 V
EXH
Max
—
—
10
10
0.6
—
0.6
—
Min
20
20
—
—
0.4
80
0.4
80
V
10%
CC
= 5.0 V
Max
—
—
5
5
0.6
—
0.6
—
t
EXf
t
EXL
Unit
ns
ns
ns
ns
t
ns
t
ns
cyc
cyc
Rev.6.00 Oct.28.2004 page 665 of 1016
Test
Conditions
Figure 20-6
ø
ø < 5 MHz
ø
ø < 5 MHz
5 MHz
5 MHz
V
CC
0.5
Figure 22-4
REJ09B0138-0600H
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