DF2398TE20V Renesas Electronics America, DF2398TE20V Datasheet - Page 382
![IC H8S MCU FLASH 256K 120TQFP](/photos/12/21/122170/df2398te20v_sml.jpg)
DF2398TE20V
Manufacturer Part Number
DF2398TE20V
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2398TE20V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 382 of 1049
- Download datasheet (5Mb)
Bits 7 to 4— I/O Control B3 to B0 (IOB3 to IOB0)
Note:
Rev.6.00 Oct.28.2004 page 352 of 1016
REJ09B0138-0600H
Bits IOB3 to IOB0 specify the function of TGRB.
Bits IOD3 to IOD0 specify the function of TGRD.
*
When bits TPSC2 to TPSC0 in TCR1 are set to B'000 and ø/1 is used as the TCNT1 count clock, this setting is
invalid and input capture is not generated.
Channel
0
I/O Control D3 to D0 (IOD3 to IOD0):
Bit 7
IOB3
0
1
Bit 6
IOB2
0
1
0
1
Bit 5
IOB1
0
1
0
1
0
1
Bit 4
IOB0 Description
0
1
0
1
0
1
0
1
0
1
TGR0B is Output disabled
output
compare
register
TGR0B is
input
capture
register
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCB0 pin
Capture input
source is channel
1/count clock
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1
count- up/count-down*
(Initial value)
: Don’t care
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