DF2398TE20V Renesas Electronics America, DF2398TE20V Datasheet - Page 261
![IC H8S MCU FLASH 256K 120TQFP](/photos/12/21/122170/df2398te20v_sml.jpg)
DF2398TE20V
Manufacturer Part Number
DF2398TE20V
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2398TE20V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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When the write data buffer function is activated, the DMAC recognizes that the bus cycle concerned has ended, and starts
the next operation. Therefore, DREQ pin sampling is started one state after the start of the DMA write cycle or single
address transfer.
7.5.13
The DMAC channel priority order is: channel 0 > channel 1, and channel A > channel B. Table 7-13 summarizes the
priority order for DMAC channels.
Table 7-13 DMAC Channel Priority Order
DMAC Multi-Channel Operation
Figure 7-34 Example of Single Address Transfer Using Write Data Buffer Function
Internal read signal
Short Address Mode
Channel 0A
Channel 0B
Channel 1A
Channel 1B
External address
Internal address
DACK
RD
ø
DMA
read
DMA
single
Full Address Mode
Channel 0
Channel 1
CPU
read
DMA
single
Rev.6.00 Oct.28.2004 page 231 of 1016
Priority
High
Low
CPU
read
REJ09B0138-0600H
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