MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 70

IC MCU 16BIT EEPROM 4K 112-LQFP

MC812A4CPVE8

Manufacturer Part Number
MC812A4CPVE8
Description
IC MCU 16BIT EEPROM 4K 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC812A4CPVE8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
83
Program Memory Size
4KB (4K x 8)
Program Memory Type
EEPROM
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC812A
Core
HC12
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
91
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Controller Family/series
68HC12
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Bus Control and Input/Output (I/O)
PIPOE — Pipe Status Signal Output Enable Bit
NECLK — No External E Clock Bit
LSTRE — Low Strobe (LSTRB) Enable Bit
RDWE — Read/Write Enable Bit
70
Normal modes: Write once
Special modes: Write anytime except the first time
Normal modes: Write anytime
Special modes: Write never
In peripheral mode, E is an input; in all other modes, E is an output.
Normal modes: Write once
Special modes: Write anytime except the first time
LSTRE has no effect in single-chip or normal expanded narrow modes.
LSTRB is for external writes. After reset in normal expanded mode, LSTRB is disabled. If needed, it
must be enabled before external writes. External reads do not normally need LSTRB because all 16
data bits can be driven even if the MCU only needs eight bits of data.
In normal expanded narrow mode, this pin is reset to an output driving high allowing the pin to be an
output while in and immediately after reset.
Normal modes: Write once
Special modes: Write anytime except the first time
RDWE has no effect in single-chip modes.
R/W is used for external writes. After reset in normal expanded mode, it is disabled. If needed, it must
be enabled before any external writes.
1 = PE6 and PE5 are outputs and indicate the state of the instruction queue; no effect in single-chip
0 = PE6 and PE5 are general-purpose I/O; if PLLTE = 1, PE6 is a test output signal from the PLL
1 = PE4 is a general-purpose I/O pin.
0 = PE4 is the external E-clock pin. To get a free-running E-clock in single-chip modes, use
1 = PE3 is configured as the LSTRB bus-control output, except in single-chip or normal expanded
0 = PE3 is a general-purpose I/O pin.
1 = PE2 is configured as the R/W pin. In single-chip modes, RDWE has no effect and PE2 is a
0 = PE2 is a general-purpose I/O pin.
modes.
module.
NECLK = 0 and IVIS = 1. A 16-bit write to PEAR:MODE can configure these bits in one
operation.
narrow modes.
general-purpose I/O pin.
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor

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