MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 122

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Standard Timer Module
12.4 Functional Description
This section provides a functional description of the standard timer.
12.4.1 Prescaler
The prescaler divides the module clock by 1, 2, 4, 8, 16, or 32. The prescaler select bits, PR2, PR1, and
PR0, select the prescaler divisor. PR2, PR1, and PR0 are in the timer mask 2 register (TMSK2).
12.4.2 Input Capture
Clearing the I/O (input/output) select bit, IOSx, configures channel x as an input capture channel. The
input capture function captures the time at which an external event occurs. When an active edge occurs
on the pin of an input capture channel, the timer transfers the value in the timer counter into the timer
channel registers, TIMCxH and TIMCxL.
In 8-bit MCUs, the low byte of the timer channel register (TIMCxL) is held for one bus cycle after the high
byte (TIMCxH) is read. This allows coherent reading of the timer channel such that an input capture does
not occur between two back-to-back 8-bit reads. To read the 16-bit timer channel register, use a
double-byte read instruction such as LDD or LDX.
The minimum pulse width for the input capture input is greater than two module clocks.
The input capture function does not force data direction. The timer port data direction register controls the
data direction of an input capture pin. Pin conditions can trigger an input capture on a pin configured as
an input. Software can trigger an input capture on an input capture pin configured as an output.
An input capture on channel x sets the CxF flag. The CxI bit enables the CxF flag to generate interrupt
requests.
12.4.3 Output Compare
Setting the I/O select bit, IOSx, configures channel x as an output compare channel. The output compare
function can generate a periodic pulse with a programmable polarity, duration, and frequency. When the
timer counter reaches the value in the channel registers of an output compare channel, the timer can set,
clear, or toggle the channel pin. An output compare on channel x sets the CxF flag. The CxI bit enables
the CxF flag to generate interrupt requests.
The output mode and level bits, OMx and OLx, select set, clear, or toggle on output compare. Clearing
both OMx and OLx disconnects the pin from the output logic.
122
$00AE
$00AF
Addr.
Timer Port Data Direction
Timer Port Data Register
Register Name
Register (DDRT)
See page 139.
See page 140.
(PORTT)
Figure 12-2. I/O Register Summary (Sheet 4 of 4)
Reset:
Reset:
Read:
Read:
Write:
Write:
Bit 7
Bit 7
PT7
0
MC68HC812A4 Data Sheet, Rev. 7
= Unimplemented
PT6
6
5
0
PT5
5
5
0
Unaffected by reset
PT4
R
4
4
0
= Reserved
PT3
3
3
0
PT2
2
2
0
Freescale Semiconductor
PT1
1
1
0
Bit 0
Bit 0
PT0
0