MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 68

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Bus Control and Input/Output (I/O)
6.3.9 Port E Data Register
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
This register is associated with external bus control signals and interrupt inputs including auxiliary reset
(ARST), mode select (MODB/IPIPE1, MODA/IPIPE0), E-clock, size (LSTRB), read/write (R/W), IRQ, and
XIRQ. When the associated pin is not used for one of these specific functions, the pin can be used as
general-purpose I/O. The port E assignment register (PEAR) selects the function of each pin. DDRE
determines the primary direction of each port E pin when configured to be general-purpose I/O.
Some of these pins have software selectable pullups (LSTRB, R/W, and XIRQ). A single control bit
enables the pullups for all these pins which are configured as inputs. IRQ always has a pullup.
PE7 can be selected as a high-true auxiliary reset input.
This register is not in the map in peripheral mode or expanded modes when the EME bit is set.
6.3.10 Port E Data Direction Register
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
This register determines the primary direction for each port E pin configured as general-purpose I/O.
PE1 and PE0 are associated with XIRQ and IRQ and cannot be configured as outputs. These pins can
be read regardless of whether the alternate interrupt functions are enabled.
This register is not in the map in peripheral mode and expanded modes while the EME control bit is set.
68
1 = Associated pin is an output.
0 = Associated pin is a high-impedance input.
Normal narrow expanded:
Normal narrow expanded:
Alternate pin function:
All other modes:
All other modes:
Address: $0008
Address: $0009
Reset:
Read:
Write:
Reset:
Read:
Write:
Figure 6-10. Port E Data Direction Register (DDRE)
ARST
Bit 7
DDRE7
PE7
Bit 7
0
0
0
0
0
Figure 6-9. Port E Data Register (PORTE)
MODB or
IPIPE1
DDRE6
PE6
MC68HC812A4 Data Sheet, Rev. 7
6
0
0
6
0
0
0
MODA or
IPIPE0
DDRE5
PE5
5
0
0
5
0
0
0
DDRE4
Unaffected by reset
ECLK
PE4
4
0
0
4
0
0
0
LSTRB
DDRE3
PE3
3
1
0
3
0
1
0
DDRE2
R/W
PE2
2
2
0
0
0
0
0
DDRE1
PE1
IRQ
Freescale Semiconductor
1
1
0
0
1
0
0
DDRE0
Bit 0
Bit 0
XIRQ
PE0
1
0
0
0
0