MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 133

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TOF — Timer Overflow Flag
12.5.13 Timer Channel Registers
Read: Anytime
Write: Output compare channel, anytime; input capture channel, no effect
When a channel is configured for input capture (IOSx = 0), the timer channel registers latch the value of
the free-running counter when a defined transition occurs on the corresponding input capture pin.
When a channel is configured for output compare (IOSx = 1), the timer channel registers contain the
output compare value.
Freescale Semiconductor
TOF is set when the timer counter rolls over from $FFFF to $0000. Clear TOF by writing a 1 to it.
1 = Timer overflow
0 = No timer overflow
Address: TC0H/L:
Reset:
Read:
Write:
When the timer channel 7 registers contain $FFFF and the timer counter
reset enable bit, TCRE, is set, TOF does not get set when the counter rolls
over.
When the fast flag clear-all bit, TFFCA, is set, any access to the timer
counter registers clears TOF.
Reset:
Read:
Write:
TC1H/L:
TC2H/L:
TC3H/L:
TC4H/L:
TC5H/L:
TC6H/L:
TC7H/L:
Bit 7
Bit 7
Bit 15
Bit 7
0
0
Figure 12-20. Timer Channel Registers (TCxH/L)
$0090/$0091
$0092/$0093
$0094/$0095
$0096/$0097
$0098/$0099
$009A/$009B
$009C/$009D
$009E/$009F
6
6
0
14
6
0
MC68HC812A4 Data Sheet, Rev. 7
5
5
0
13
5
0
NOTE
NOTE
4
4
0
12
4
0
3
3
0
11
3
0
2
2
0
10
2
0
Registers and Reset Initialization
1
1
0
1
9
0
Bit 0
Bit 0
Bit 0
0
8
0
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