MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 30

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Register Block
30
$000A
$000B
$000C
$000D
$000E
$000F
$0007
$0008
$0009
$0010
$0011
$0012
$0013
Addr.
RAM Initialization Register
Control Register (MISC)
Miscellaneous Mapping
EEPROM Initialization
Register Name
Port D Data Direction
Port E Data Direction
Register Initialization
Port E Data Register
Port E Assignment
Register (INITRG)
Register (INITEE)
Register (RDRIV)
Register (DDRD)
Register (DDRE)
Register (PUCR)
Register (PEAR)
Reduced Drive
Mode Register
Pullup Control
See page 67.
See page 68.
See page 68.
See page 69.
See page 58.
See page 71.
See page 72.
See page 60.
See page 59.
See page 60.
See page 61.
Reserved
Reserved
(PORTE)
(INITRM)
(MODE)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Figure 2-1. Register Map (Sheet 2 of 14)
SMODN
DDRE7
RAM15
EWDIR
REG15
ARSIE
PUPH
RDPJ
EE15
Bit 7
Bit 7
PE7
R
R
0
0
0
0
0
1
0
0
0
0
0
MC68HC812A4 Data Sheet, Rev. 7
= Unimplemented
DDRE6
RAM14
REG14
PLLTE
MODB
PUPG
RDPH
NDRC
EE14
Bit 6
PE6
R
R
6
0
0
0
0
0
1
0
0
0
0
0
DDRE5
RAM13
REG13
PIPOE
MODA
RDPG
PUPF
EE13
Bit 5
PE5
R
R
5
0
0
0
1
0
1
0
0
0
0
0
0
DDRE4
NECLK
RAM12
REG12
ESTR
PUPE
RDPF
EE12
Bit 4
PD4
R
R
R
0
0
1
0
0
4
0
0
0
0
1
1
0
= Reserved
DDRE3
RAM11
LSTRE
REG11
PUPD
RDPE
Bit 3
PD3
IVIS
R
R
3
0
1
0
1
1
1
0
1
0
0
0
0
0
DDRE2
RDWE
PRPD
PUC
Bit 2
PD2
R
R
2
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
Freescale Semiconductor
U = Unaffected
DDRE1
RDPC
PUPB
EMD
Bit 1
PD1
R
R
1
0
0
1
0
0
1
1
0
0
0
0
0
0
0
0
0
RDPAB
DDRE0
EEON
PUPA
Bit 0
EME
Bit 0
PD0
R
R
0
0
1
0
0
1
1
0
0
0
0
0
1
0
0