MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 198

IC MCU 16BIT EEPROM 4K 112-LQFP

MC812A4CPVE8

Manufacturer Part Number
MC812A4CPVE8
Description
IC MCU 16BIT EEPROM 4K 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC812A4CPVE8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
83
Program Memory Size
4KB (4K x 8)
Program Memory Type
EEPROM
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC812A
Core
HC12
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
91
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Controller Family/series
68HC12
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Analog-to-Digital Converter (ATD)
16.5 Functional Description
A single conversion sequence consists of four or eight conversions, depending on the state of the select
8-channel mode bit, S8CM, in ATD control register 5 (ATDCTL5). There are eight basic conversion
modes.
In the non-scan modes, the sequence complete flag, SCF, is set after the sequence of four or eight
conversions has been performed and the ATD module halts.
In the scan modes, the SCF flag is set after the first sequence of four or eight conversions has been
performed, and the ATD module continues to restart the sequence.
198
Addr.
$007C
$006F
$007A
$007E
$0070
$0072
$0074
$0076
$0078
ATD Result Register 0
ATD Result Register 1
ATD Result Register 2
ATD Result Register 3
ATD Result Register 4
ATD Result Register 5
ATD Result Register 6
ATD Result Register 7
Register Name
Register (PORTAD)
Port AD Data Input
See page 207.
See page 206.
See page 206.
See page 206.
See page 206.
See page 206.
See page 206.
See page 206.
See page 206.
(ADR0H)
(ADR1H)
(ADR2H)
(ADR3H)
(ADR4H)
(ADR5H)
(ADR6H)
(ADR7H)
Figure 16-2. ATD I/O Register Summary (Continued)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
ADRxH7
ADRxH7
ADRxH7
ADRxH7
ADRxH7
ADRxH7
ADRxH7
ADRxH7
PAD7
Bit 7
0
MC68HC812A4 Data Sheet, Rev. 7
= Unimplemented
ADRxH6
ADRxH6
ADRxH6
ADRxH6
ADRxH6
ADRxH6
ADRxH6
ADRxH6
PAD6
6
0
ADRxH5
ADRxH5
ADRxH5
ADRxH5
ADRxH5
ADRxH5
ADRxH5
ADRxH5
PAD5
5
0
ADRxH4
ADRxH4
ADRxH4
ADRxH4
ADRxH4
ADRxH4
ADRxH4
ADRxH4
PAD4
4
0
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
ADRxH3
ADRxH3
ADRxH3
ADRxH3
ADRxH3
ADRxH3
ADRxH3
ADRxH3
PAD3
3
0
ADRxH2
ADRxH2
ADRxH2
ADRxH2
ADRxH2
ADRxH2
ADRxH2
ADRxH2
PAD2
2
0
Freescale Semiconductor
ADRxH1
ADRxH1
ADRxH1
ADRxH1
ADRxH1
ADRxH1
ADRxH1
ADRxH1
PAD1
1
0
ADRxH0
ADRxH0
ADRxH0
ADRxH0
ADRxH0
ADRxH0
ADRxH0
ADRxH0
PAD0
Bit 0
0

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