C8051F321-GM Silicon Laboratories Inc, C8051F321-GM Datasheet - Page 39

IC 8051 MCU 16K FLASH 28MLP

C8051F321-GM

Manufacturer Part Number
C8051F321-GM
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheets

Specifications of C8051F321-GM

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
I2C/SMBus/SPI/UART/USB
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
21
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F320DK
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit or 17-ch x 10-bit
No. Of I/o's
21
Ram Memory Size
1280Byte
Cpu Speed
25MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1480 - DAUGHTER CARD TOOLSTCK C8051F321770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1449 - ADAPTER PROGRAM TOOLSTICK F321336-1260 - DEV KIT FOR C8051F320/F321
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1261

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5.
The ADC0 subsystem for the C8051F320/1 consists of two analog multiplexers (referred to collectively as AMUX0)
with 17 total input selections, and a 200 ksps, 10-bit successive-approximation-register ADC with integrated track-
and-hold and programmable window detector. The AMUX0, data conversion modes, and window detector are all
configurable under software control via the Special Function Registers shown in Figure 5.1. ADC0 operates in both
Single-ended and Differential modes, and may be configured to measure P1.0-P3.0, the Temperature Sensor output,
or VDD with respect to P1.0-P3.0, VREF, or GND. The ADC0 subsystem is enabled only when the AD0EN bit in the
ADC0 Control register (ADC0CN) is set to logic 1. The ADC0 subsystem is in low power shutdown when this bit is
logic 0.
available on
C8051F320
available on
C8051F320
P2.4-2.7
P2.4-2.7
Sensor
Temp
10-BIT ADC (ADC0)
VREF
GND
P1.0
P1.7
P2.0
P2.7
P3.0
VDD
P1.0
P1.7
P2.0
P2.7
P3.0
19-to-1
19-to-1
AMUX
AMUX
AMX0N
AMX0P
Figure 5.1. ADC0 Functional Block Diagram
Rev. 1.1
(+)
(-)
ADC0CF
ADC
10-Bit
VDD
SAR
ADC0GTH ADC0GTL
ADC0LTH
ADC0CN
ADC0LTL
C8051F320/1
Conversion
Start
000
001
010
011
100
101
32
AD0WINT
Compare
Window
AD0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 1 Overflow
CNVSTR Input
Timer 3 Overflow
Logic
39

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