C8051F321-GM Silicon Laboratories Inc, C8051F321-GM Datasheet - Page 11

• Manufacturer Part Number: C8051F321-GM
• Description: IC 8051 MCU 16K FLASH 28MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F321-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 21
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: I2C/SMBus/SPI/UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F320DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit or 17-ch x 10-bit
• No. Of I/o's: 21
• Ram Memory Size: 1280Byte
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1480 - DAUGHTER CARD TOOLSTCK C8051F321770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1449 - ADAPTER PROGRAM TOOLSTICK F321336-1260 - DEV KIT FOR C8051F320/F321
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1261

10. RESET SOURCES .............................................................................................................99
11. FLASH MEMORY ...........................................................................................................107
12. EXTERNAL RAM ............................................................................................................113
13. OSCILLATORS ..................................................................................................................117
14. PORT INPUT/OUTPUT ..................................................................................................127
Figure 9.14. EIP2: Extended Interrupt Priority 2.....................................................................94
Figure 9.15. IT01CF: INT0/INT1 Configuration Register ......................................................95
Figure 9.16. PCON: Power Control Register ..........................................................................97
Figure 10.1. Reset Sources ......................................................................................................99
Figure 10.2. Power-On and VDD Monitor Reset Timing .....................................................100
Figure 10.3. VDM0CN: VDD Monitor Control ....................................................................101
Figure 10.4. RSTSRC: Reset Source Register.......................................................................104
Table 10.1. Reset Electrical Characteristics .........................................................................105
Table 11.1. FLASH Electrical Characteristics .....................................................................108
Figure 11.1. FLASH Program Memory Map and Security Byte...........................................110
Figure 11.2. PSCTL: Program Store R/W Control ................................................................110
Figure 11.3. FLKEY: FLASH Lock and Key Register .........................................................111
Figure 11.4. FLSCL: FLASH Scale Register ........................................................................111
Figure 12.1. External Ram Memory Map..............................................................................113
Figure 12.2. XRAM Memory Map Expanded View .............................................................114
Figure 12.3. EMI0CN: External Memory Interface Control .................................................115
Figure 13.1. Oscillator Diagram ............................................................................................117
Figure 13.2. OSCICN: Internal Oscillator Control Register .................................................119
Figure 13.3. OSCICL: Internal Oscillator Calibration Register ............................................119
Figure 13.4. OSCXCN: External Oscillator Control Register...............................................122
Figure 13.5. CLKMUL: Clock Multiplier Control Register..................................................123
Table 13.1. Typical USB Full Speed Clock Settings ...........................................................124
Table 13.2. Typical USB Low Speed Clock Settings...........................................................124
Figure 13.6. CLKSEL: Clock Select Register .......................................................................125
Table 13.3. Internal Oscillator Electrical Characteristics.....................................................126
Figure 14.1. Port I/O Functional Block Diagram ..................................................................127
Figure 14.2. Port I/O Cell Block Diagram.............................................................................128
Figure 14.3. Crossbar Priority Decoder with No Pins Skipped .............................................129
Figure 14.4. Crossbar Priority Decoder with Crystal Pins Skipped ......................................130
Figure 14.5. XBR0: Port I/O Crossbar Register 0 .................................................................132
Figure 14.6. XBR1: Port I/O Crossbar Register 1 .................................................................133
Figure 14.7. P0: Port0 Register..............................................................................................135
Figure 14.8. P0MDIN: Port0 Input Mode Register ...............................................................135
Figure 14.9. P0MDOUT: Port0 Output Mode Register.........................................................136
Figure 14.10. P0SKIP: Port0 Skip Register...........................................................................136
Figure 14.11. P1: Port1 Register............................................................................................137
Figure 14.12. P1MDIN: Port1 Input Mode Register .............................................................137
Figure 14.13. P1MDOUT: Port1 Output Mode Register.......................................................138
Figure 14.14. P1SKIP: Port1 Skip Register...........................................................................138
Figure 14.15. P2: Port2 Register............................................................................................139
Rev. 1.1
C8051F320/1
11