C8051F321-GM Silicon Laboratories Inc, C8051F321-GM Datasheet - Page 153

• Manufacturer Part Number: C8051F321-GM
• Description: IC 8051 MCU 16K FLASH 28MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F321-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 21
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: I2C/SMBus/SPI/UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F320DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit or 17-ch x 10-bit
• No. Of I/o's: 21
• Ram Memory Size: 1280Byte
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1480 - DAUGHTER CARD TOOLSTCK C8051F321770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1449 - ADAPTER PROGRAM TOOLSTICK F321336-1260 - DEV KIT FOR C8051F320/F321
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1261

15.6. Function Addressing
The FADDR register holds the current USB0 function address. Software should write the host-assigned 7-bit function
address to the FADDR register when received as part of a SET_ADDRESS command. A new address written to
FADDR will not take effect (USB0 will not respond to the new address) until the end of the current transfer (typically
following the status phase of the SET_ADDRESS command transfer). The UPDATE bit (FADDR.7) is set to ‘1’ by
hardware when software writes a new address to the FADDR register. Hardware clears the UPDATE bit when the
new address takes effect as described above.
Bit7:
Bits6-0:
Update
Bit7
R
Update: Function Address Update
Set to ‘1’ when software writes the FADDR register. USB0 clears this bit to ‘0’ when the new address
takes effect.
0: The last address written to FADDR is in effect.
1: The last address written to FADDR is not yet in effect.
Function Address
Holds the 7-bit function address for USB0. This address should be written by software when the
SET_ADDRESS standard device request is received on Endpoint0. The new address takes effect
when the device request completes.
Figure 15.10. FADDR: USB0 Function Address (USB Register)
R/W
Bit6
R/W
Bit5
R/W
Bit4
Function Address
R/W
Bit3
Rev. 1.1
R/W
Bit2
R/W
Bit1
C8051F320/1
R/W
Bit0
USB Address:
00000000
Reset Value
0x00
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