C8051F321-GM Silicon Laboratories Inc, C8051F321-GM Datasheet - Page 246

• Manufacturer Part Number: C8051F321-GM
• Description: IC 8051 MCU 16K FLASH 28MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F321-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 21
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: I2C/SMBus/SPI/UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F320DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit or 17-ch x 10-bit
• No. Of I/o's: 21
• Ram Memory Size: 1280Byte
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1480 - DAUGHTER CARD TOOLSTCK C8051F321770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1449 - ADAPTER PROGRAM TOOLSTICK F321336-1260 - DEV KIT FOR C8051F320/F321
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1261

C8051F320/1
20.3. Watchdog Timer Mode
A programmable watchdog timer (WDT) function is available through the PCA Module 4. The WDT is used to gen-
erate a reset if the time between writes to the WDT update register (PCA0CPH4) exceed a specified limit. The WDT
can be configured and enabled/disabled as needed by software.
With the WDTE and/or WDLCK bits set to ‘1’ in the PCA0MD register, Module 4 operates as a watchdog timer
(WDT). The Module 4 high byte is compared to the PCA counter high byte; the Module 4 low byte holds the offset to
be used when WDT updates are performed. The Watchdog Timer is enabled on reset. Writes to some PCA regis-
ters are restricted while the Watchdog Timer is enabled.
20.3.1. Watchdog Timer Operation
While the WDT is enabled:
•
•
•
•
•
•
While the WDT is enabled, writes to the CR bit will not change the PCA counter state; the counter will run until the
WDT is disabled. The PCA counter run control (CR) will read zero if the WDT is enabled but user software has not
enabled the PCA counter. If a match occurs between PCA0CPH4 and PCA0H while the WDT is enabled, a reset will
be generated. To prevent a WDT reset, the WDT may be updated with a write of any value to PCA0CPH4. Upon a
PCA0CPH4 write, PCA0H plus the offset held in PCA0CPL4 is loaded into PCA0CPH4 (See Figure 20.10).
246
PCA counter is forced on.
Writes to PCA0L and PCA0H are not allowed.
PCA clock source bits (CPS2-CPS0) are frozen.
PCA Idle control bit (CIDL) is frozen.
Module 4 is forced into Watchdog Timer mode.
Writes to the Module 4 mode register (PCA0CPM4) are disabled.
PCA0CPL4
C
D
L
I
W
D
T
E
PCA0MD
W
D
C
L
K
Figure 20.10. PCA Module 4 with Watchdog Timer Enabled
PCA0CPH4
C
P
S
2
Write to
C
P
S
1
C
P
S
0
E
C
F
8-bit Adder
Enable
Adder
Enable
Rev. 1.1
PCA0CPH4
Comparator
PCA0H
8-bit
Match
PCA0L Overflow
Reset