C8051F321-GM Silicon Laboratories Inc, C8051F321-GM Datasheet - Page 146

IC 8051 MCU 16K FLASH 28MLP

C8051F321-GM

Manufacturer Part Number
C8051F321-GM
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheets

Specifications of C8051F321-GM

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
I2C/SMBus/SPI/UART/USB
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
21
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F320DK
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit or 17-ch x 10-bit
No. Of I/o's
21
Ram Memory Size
1280Byte
Cpu Speed
25MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1480 - DAUGHTER CARD TOOLSTCK C8051F321770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1449 - ADAPTER PROGRAM TOOLSTICK F321336-1260 - DEV KIT FOR C8051F320/F321
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1261

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C8051F320/1
15.3. USB Register Access
The USB0 controller registers listed in Table 15.2 are accessed through two SFRs: USB0 Address (USB0ADR) and
USB0 Data (USB0DAT). The USB0ADR register selects which USB register is targeted by reads/writes of the
USB0DAT register. See Figure 15.3.
Endpoint control/status registers are accessed by first writing the USB register INDEX with the target endpoint num-
ber. Once the target endpoint number is written to the INDEX register, the control/status registers associated with the
target endpoint may be accessed. See the “Indexed Registers” section of Table 15.2 for a list of endpoint control/sta-
tus registers.
Important Note: The USB clock must be active when accessing USB registers.
146
USB0ADR
USB0DAT
SFRs
8051
Figure 15.3. USB0 Register Access Scheme
Rev. 1.1
Registers
Registers
Common
Interrupt
Register
Access
Index
FIFO
USB Controller
Endpoint0 Control/
Endpoint1 Control/
Endpoint2 Control/
Endpoint3 Control/
Status Registers
Status Registers
Status Registers
Status Registers

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