Z8F2480AN020SG Zilog, Z8F2480AN020SG Datasheet - Page 277

• Manufacturer Part Number: Z8F2480AN020SG
• Description: MCU 8BIT 24KB FLASH 44LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F2480AN020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Processor Series: Z8F248x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4676

Table 137. Flash Page Select Register (FPS)
BITS
FIELD
RESET
R/W
ADDR
PS025011-1010
Flash Page Select Register
Flash Sector Protect Register
INFO_EN
R/W
7
0
001xxx = Program operation in progress.
010xxx = Page erase operation in progress.
100xxx = Mass erase operation in progress.
The Flash Page Select register (see
Flash Sector Protect Register. Unless the Flash controller is unlocked and written with
5EH, writes to this address target the Flash Page Select Register.
The register is used to select one of the Flash memory pages to be programmed or erased.
Each Flash Page contains 512 bytes of Flash memory. During a Page Erase operation, all
Flash memory having addresses with the most significant 7-bits given by FPS[6:0] are
chosen for program/erase operation.
INFO_EN—Information Area Enable
0 = Information Area is not selected
1 = Information Area is selected. The Information Area is mapped into the 
PAGE—Page Select
This 7-bit field identifies the Flash memory page for Page Erase and page unlocking. 
Program Memory Address[15:9] = PAGE[6:0]. For the Z8F2480 devices, the upper 1 bit
must always be 0. For the Z8F1680 devices, the upper 2 bits must always be 0. For the
Z8F0880 devices, the upper 3 bits must always be 0.
The Flash Sector Protect register is shared with the Flash Page Select Register. When the
Flash Control Register
this address targets the Flash Sector Protect Register. In all other cases, it targets the Flash
Page Select Register.
This register selects one of the eight available Flash memory sectors to be protected. The
reset state of each Sector Protect bit is an unprotected state. After a sector is protected by
Program Memory address space at addresses FE00H through FFFFH.
R/W
6
0
R/W
on page 261 is written with 73H followed by 5EH, the next write to
5
0
P R E L I M I N A R Y
R/W
Table 137
4
0
FF9H
PAGE
on page 263) shares address space with the
R/W
3
0
Z8 Encore! XP
R/W
2
0
Product Specification
R/W
1
0
®
F1680 Series
Flash Memory
R/W
0
0
263