Z8F2480AN020SG Zilog, Z8F2480AN020SG Datasheet - Page 181

• Manufacturer Part Number: Z8F2480AN020SG
• Description: MCU 8BIT 24KB FLASH 44LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F2480AN020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Processor Series: Z8F248x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4676

PS025011-1010
Bit Position
[7,5]
MPMD[1:0]
6
MPEN
4
MPBT
3
DEPOL
2
BRGCTL
1
RDAIRQ
0
IREN
Value
MULTIPROCESSOR Mode
00
01
10
11
Multiprocessor Enable
0
1
Multiprocessor Bit Transmit
0
1
Driver Enable Polarity
0
1
Baud Rate Generator Control, when LIN-UART receiver not enabled
0
1
Baud Rate Generator Control, when LIN-UART receiver enabled
0
1
Stop Bit Select
0
1
Loop Back Enable
0
1
Description
The LIN-UART generates an interrupt request on all data and address bytes.
The LIN-UART generates an interrupt request only on received address
bytes.
The LIN-UART generates an interrupt request when a received address byte
matches the value stored in the Address Compare Register and on all
successive data bytes until an address mismatch occurs.
The LIN-UART generates an interrupt request on all received data bytes for
which the most recent address byte matched the value in the Address
Compare Register.
Disable
Enable
Send a 0 in the multiprocessor bit location of the data stream (9th bit).
Send a 1 in the multiprocessor bit location of the data stream (9th bit).
DE signal is active High.
DE signal is active Low.
BRG is disabled. Reads from the Baud Rate High and Low Byte registers
return the BRG reload value.
BRG is enabled and counting. The Baud Rate Generator generates a
receive interrupt when it counts down to 0. Reads from the Baud Rate High
and Low Byte registers return the current BRG count value.
Reads from the Baud Rate High and Low Byte registers return the 
BRG Reload value.
Reads from the Baud Rate High and Low Byte registers return the current
BRG count value. Unlike the timers, there is no mechanism to latch the High
Byte when the Low Byte is read.
Received data and receiver errors generates an interrupt request to the
Interrupt controller.
Received data does not generate an interrupt request to the Interrupt
controller. Only receiver errors generate an interrupt request.
Infrared Encoder/Decoder is disabled. LIN-UART operates normally.
Infrared Encoder/Decoder is enabled. The LIN-UART transmits and receives
data through the Infrared Encoder/Decoder.
MULTIPROCESSOR
MULTIPROCESSOR
P R E L I M I N A R Y
(9-bit) mode.
(9-bit) mode.
Z8 Encore! XP
Product Specification
®
F1680 Series
LIN-UART
167