AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 691

IC ARM9 MCU 208 PQFP

AT91RM9200-QU-002

Manufacturer Part Number
AT91RM9200-QU-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-QU-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91Rx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, UART, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
122
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
122
Interface
EBI/EMI, UART/USART
Ios
122
Memory Type
ROM
Number Of Bits
32
Package Type
208-pin PQFP
Programmable Memory
128K Bytes
Timers
3-16-bit
Voltage, Range
1.65-1.95 V
Cpu Family
91R
Device Core
ARM920T
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
16KB
# I/os (max)
122
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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1768I–ATARM–09-Jul-09
Document Version
1768I
Change
USB Endpoint Size values edited in
A Warning paragraph added to
Register” on page 588
LDR Opcode edited in
Sections 37.4 and 37.5 reversed, to have
Oscillator Characteristics”
Section 41.14.3 “TXD signal is floating in Modem and Hardware Handshaking modes” on
page 682
USART Errata
240 MHz value changed into 180 MHz in
240 MHz value in OUTA and OUTB tables changed into 180 MHz in
Clock Generator PLL A Register” on page 285
PLL B Register” on page 286
Section 41.6.4 “OSCBYPASS is not functional with PLLA” on page 675
Errata
USART3 0XFFECC000 changed into 0XFFFCC000 in
OSCBYPASS added, MOSCEN and OSCOUNT edited in
Generator Main Oscillator Register” on page 283
2 rows added to
Section 25.4.5 “Updating Time/Calendar” on page 307
Standby conditions edited in
A footnote added to USART
Weight values changed in
2CKDIV changed into 2
Section 18. “Static Memory Controller (SMC)” on page 155
(6153) Programmer Datasheet content
SDIO, SDIORQA and SDIORQB removed from
(MCI) User Interface” on page 533
NWDOVF removed from
Section 24.4.3 Watchdog Overflow
EXTEN removed from
(WDT)” on page
Main Oscillator
and Motionless Capacitance) added
MCI erratum added:
674
- XIN Clock moved from
- SSC erratum added:
- USART erratum added:
page
682.
and
Section 41.14.4 “DCD is active High instead of Low” on page 682
Table 37-6 on page 634
Table 38-4 on page 649
295, and from
Section 41.4.11 “Data write operation and number of bytes” on page
Section 41.11.7 “Unexpected delay on TD output” on page 679
Figure 24-4 on page
Figure 13-3 on page 86
CKDIV
“Clock Characteristics”
Figure 24-1 on page 293
Section 41.14.5 “Bad value in Number of Errors Register” on
Table 39-4 on page 663
“Overview” on page 411
Table 37-8 on page 635
in
Section 41.13.4 “Clock Divider” on page 681
Section 24.6.3 “ST Watchdog Mode Register” on page 298
Section 34.6.10 “UDP Endpoint Control and Status
removed.
Table 34-1 on page 557
edited, and 4 values (Driver Level, ESR, Shunt
Section 23.4.3 “Clock Generator” on page 264
“Clock Characteristics”
295, from
and
Section 33.9 “MultiMedia Card Interface
to
and
Section 23.6.10 “PMC Clock Generator
and
“Crystal Oscillator Characteristics”
Section 24.5.3 “Watchdog Timer
Figure 8-1 on page 17
edited
Figure 24-4 on page
Table 39-7 on page 664
Section 23.6.7 “PMC Clock
changed, using SMC_ABC
followed by
Section 23.6.9 “PMC
added to PMC
295.
“Crystal
added to
AT91RM9200
.
CSR Ref.
3481
3764
4453
4666
4723
4923
4925
4964
5067
5077
5102
5113
5192
5208
5258
5431
5618
5628
5683
6333
6426
RFO
691

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