AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 136

IC ARM9 MCU 208 PQFP

AT91RM9200-QU-002

Manufacturer Part Number
AT91RM9200-QU-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-QU-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91Rx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, UART, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
122
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
122
Interface
EBI/EMI, UART/USART
Ios
122
Memory Type
ROM
Number Of Bits
32
Package Type
208-pin PQFP
Programmable Memory
128K Bytes
Timers
3-16-bit
Voltage, Range
1.65-1.95 V
Cpu Family
91R
Device Core
ARM920T
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
16KB
# I/os (max)
122
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Table 17-1.
Table 17-2.
136
Name
BFCK
BFCS
BFAVD
BFBAA
BFOE
BFRDY
BFWE
EBI Pins
NWR1/NBS1/CFIOR
A0/NBS0
A1
A[11:2]
SDA10
A12
A[14:13]
A[25:15]
D[31:16]
D[15:0]
AT91RM9200
I/O Lines Description (Continued)
EBI Pins and Memory Controllers I/O Line Connections
The connection of some signals through the MUX logic is not direct and depends on the Memory
Controller in use at the moment.
Table 17-2
pins.
Function
Burst Flash Clock
Burst Flash Chip Select Line
Burst Flash Address Valid Signal
Burst Flash Address Advance Signal
Burst Flash Output Enable
Burst Flash Ready Signal
Burst Flash Write Enable
D[31:16]
SDRAMC I/O Lines
NBS1
Not Supported
Not Supported
A[9:0]
A10
Not Supported
A[12:11]
Not Supported
D[15:0]
below details the connections between the three Memory Controllers and the EBI
Burst Flash Controller
BFC I/O Lines
Not Supported
Not Supported
A0
A[10:1]
Not Supported
A11
A[13:12]
A[24:14]
Not Supported
D[15:0]
Output
Output
Output
Output
Output
Output
Type
Input
SMC I/O Lines
NWR1/NUB
A0/NLB
A1
A[11:2]
Not Supported
A12
A[14:13]
A[25:15]
Not Supported
D[15:0]
1768I–ATARM–09-Jul-09
Active Level
High
Low
Low
Low
Low
Low

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