AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 66

• Manufacturer Part Number: AT91RM9200-QU-002
• Description: IC ARM9 MCU 208 PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-QU-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Processor Series: AT91Rx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, UART, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 122
• Number Of Timers: 10 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
• Minimum Operating Temperature: - 40 C
• Eeprom Memory: 0 Bytes
• Input Output: 122
• Interface: EBI/EMI, UART/USART
• Ios: 122
• Memory Type: ROM
• Number Of Bits: 32
• Package Type: 208-pin PQFP
• Programmable Memory: 128K Bytes
• Timers: 3-16-bit
• Voltage, Range: 1.65-1.95 V
• Cpu Family: 91R
• Device Core: ARM920T
• Device Core Size: 32b
• Frequency (max): 180MHz
• Total Internal Ram Size: 16KB
• # I/os (max): 122
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

66
Memory Decoder Inputs
FIFO
Half-rate Clocking Mode
AT91RM9200
The eight memory map decoder inputs are connected to custom address decoders. The
address decoders divide the memory into regions of on-chip SRAM, on-chip ROM, and peripher-
als. The address decoders also optimize the ETM9 trace trigger.
Table 12-2.
An 18-byte FIFO is used to store data tracing. The FIFO is used to separate the pipeline status
from the trace packet. So, the FIFO can be used to buffer trace packets.
A FIFO overflow is detected by the embedded trace macrocell when the FIFO is full or when the
FIFO has less bytes than the user-programmed number.
For further details, see the ETM9 (Rev2a) Technical Reference Manual, ARM Ltd. DDI 0157E.
The ETM9 is implemented in half-rate mode that allows both rising and falling edge data tracing
of the trace clock.
The half-rate mode is implemented to maintain the signal clock integrity of high speed systems
(up to 100 Mhz).
Figure 12-5.
Care must be taken on the choice of the trace capture system as it needs to support half-rate
clock functionality.
Description
SRAM
SRAM
ROM
ROM
NCS0-NCS7
NCS0-NCS7
User Peripheral
System
Peripheral
ETM Memory Map Inputs Layout
Half-rate Clocking Mode
Region
Internal
Internal
Internal
Internal
External
External
Internal
Internal
ARM920T Clock
Trace Clock
TraceData
Access type
Data
Fetch
Data
Fetch
Data
Fetch
Data
Data
Half-rate Clocking Mode
start_address
0x00000000
0x00000000
0x00100000
0x00100000
0x10000000
0x10000000
0xF0000000
0xFFFFF000
end_address
0x000FFFFF
0x000FFFFF
0x001FFFFF
0x001FFFFF
0x8FFFFFFF
0x8FFFFFFF
0xFFFFEFFF
0xFFFFFFFF
1768I–ATARM–09-Jul-09