AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 618

IC ARM9 MCU 208 PQFP

AT91RM9200-QU-002

Manufacturer Part Number
AT91RM9200-QU-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-QU-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91Rx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, UART, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
122
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
122
Interface
EBI/EMI, UART/USART
Ios
122
Memory Type
ROM
Number Of Bits
32
Package Type
208-pin PQFP
Programmable Memory
128K Bytes
Timers
3-16-bit
Voltage, Range
1.65-1.95 V
Cpu Family
91R
Device Core
ARM920T
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
16KB
# I/os (max)
122
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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36.6.4
Name:
Access Type:
• ADDRESS: Transmit Address Register
Written with the address of the frame to be transmitted, read as the base address of the buffer being accessed by the trans-
mit FIFO. Note that if the two least significant bits are not zero, transmit starts at the byte indicated.
36.6.5
Name:
Access Type:
• LEN: Transmit Frame Length
This register is written to the number of bytes to be transmitted excluding the four CRC bytes unless the no CRC bit is
asserted. Writing these bits to any non-zero value initiates a transmission. If the value is greater than 1514 (1518 if no CRC
is being generated), an oversize frame is transmitted. This field is buffered so that a new frame can be queued while the
previous frame is still being transmitted. Must always be written in address-then-length order. Reads as the total number of
bytes to be transmitted (i.e., this value does not change as the frame is transmitted.) Frame transmission does not start
until two 32-bit words have been loaded into the transmit FIFO. The length must be great enough to ensure two words are
loaded.
• NCRC: No CRC
If this bit is set, it is assumed that the CRC is included in the length being written in the low-order bits and the MAC does not
append CRC to the transmitted frame. If the buffer is not at least 64 bytes long, a short frame is sent. This field is buffered
so that a new frame can be queued while the previous frame is still being transmitted. Reads as the value of the frame cur-
rently being transmitted.
618
NCRC
31
23
15
31
23
15
7
7
AT91RM9200
EMAC Transmit Address Register
EMAC Transmit Control Register
30
22
14
30
22
14
ETH_TAR
Read/Write
6
ETH_TCR
Read/Write
6
29
21
13
29
21
13
5
5
28
20
12
28
20
12
4
4
ADDRESS
ADDRESS
ADDRESS
ADDRESS
LEN
27
19
11
27
19
11
3
3
26
18
10
26
18
10
2
2
LEN
25
17
25
17
9
1
9
1
1768I–ATARM–09-Jul-09
24
16
24
16
8
0
8
0

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