AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 649
AT91RM9200-QU-002
Manufacturer Part Number
AT91RM9200-QU-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91RM9200-EK.pdf
(41 pages)
2.AT91RM9200-QU-002.pdf
(701 pages)
3.AT91RM9200-QU-002.pdf
(38 pages)
Specifications of AT91RM9200-QU-002
Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91Rx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, UART, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
122
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
122
Interface
EBI/EMI, UART/USART
Ios
122
Memory Type
ROM
Number Of Bits
32
Package Type
208-pin PQFP
Programmable Memory
128K Bytes
Timers
3-16-bit
Voltage, Range
1.65-1.95 V
Cpu Family
91R
Device Core
ARM920T
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
16KB
# I/os (max)
122
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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38.2.2
Table 38-4
tions and Timings Computation” on page
Table 38-4.
Table 38-5.
1768I–ATARM–09-Jul-09
Symbol
1/(t
t
t
t
t
t
Symbol
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
SDRAMC
CPSDCK
CHSDCK
CLSDCK
MCKtoSDCK_RISING
MCKtoSDCK_FALLING
CPSDCK
)
1
2
3
4
5
6
7
8
9
10
11
SDRAMC Signals Relative to SDCK
and
SDRAMC Clock Signal
SDRAMC Signals
Parameter
SDCKE High before SDCK Rising Edge
SDCKE Low after SDCK Rising Edge
SDCKE Low before SDCK Rising Edge
SDCKE High after SDCK Rising Edge
SDCS Low before SDCK Rising Edge
SDCS High after SDCK Rising Edge
RAS Low before SDCK Rising Edge
RAS High after SDCK Rising Edge
SDA10 Change before SDCK Rising Edge
SDA10 Change after SDCK Rising Edge
Address Change before SDCK Rising Edge
Table 38-5
Parameter
SDRAM Controller Clock Frequency
SDRAM Controller Clock Period
SDRAM Controller Clock High Half-Period
SDRAM Controller Clock Low Half-Period
MCK Rising to SDCK Rising
MCK Falling to SDCK Falling
below show timings relative to operating condition limits defined in the section
639.
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Conditions
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
SDCKE
SDCKE
SDCKE
SDCKE
SDCKE
SDCKE
SDCKE
SDCKE
SDCS
SDCS
SDCS
SDCS
RAS
RAS
RAS
RAS
SDA10
SDA10
SDA10
SDA10
ADD
ADD
Conditions
= 0 pF
derating
= 0 pF
derating
= 0 pF
derating
= 0 pF
derating
= 0 pF
derating
derating
= 0 pF
derating
= 0 pF
= 0 pF
derating
= 0 pF
derating
= 0 pF
derating
= 0 pF
derating
t
t
t
t
t
t
t
t
t
t
t
CLMCK
CLMCK
CLMCK
CLMCK
CLMCK
CLMCK
CHMCK
CHMCK
CHMCK
CHMCK
CHMCK
- 0.015
- 0.015
- 0.028
- 0.015
- 0.015
- 0.028
5.381
4.832
0.023
0.045
0.023
0.023
12.5
0.023
Min
Min
5.6
6.9
+ 1.2
+ 1.0
+ 1.2
+ 0.6
+ 0.8
+ 0.6
- 1.4
- 1.7
- 1.9
- 1.1
- 1.2
AT91RM9200
8.038
7.219
Max
80.0
Max
38.1.1 “Condi-
Units
Units
ns/pF
ns/pF
ns/pF
ns/pF
ns/pF
ns/pF
ns/pF
ns/pF
ns/pF
ns/pF
ns/pF
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
649
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