AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 679

• Manufacturer Part Number: AT91RM9200-QU-002
• Description: IC ARM9 MCU 208 PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-QU-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Processor Series: AT91Rx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, UART, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 122
• Number Of Timers: 10 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
• Minimum Operating Temperature: - 40 C
• Eeprom Memory: 0 Bytes
• Input Output: 122
• Interface: EBI/EMI, UART/USART
• Ios: 122
• Memory Type: ROM
• Number Of Bits: 32
• Package Type: 208-pin PQFP
• Programmable Memory: 128K Bytes
• Timers: 3-16-bit
• Voltage, Range: 1.65-1.95 V
• Cpu Family: 91R
• Device Core: ARM920T
• Device Core Size: 32b
• Frequency (max): 180MHz
• Total Internal Ram Size: 16KB
• # I/os (max): 122
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

41.11.6
41.11.7
41.12 TC
41.12.1
41.12.2
41.12.3
1768I–ATARM–09-Jul-09
No delay when start condition overlays data transmit
Unexpected delay on TD output
Wrong Compare at restart if burst low
Wrong 0 captured before Compare RC trigger
Erroneous capture with burst low
When transmission of data is programmed at the end of a frame and the start condition of the
following frame is detected at the end of the current frame, the delay programmed by the
STTDLY bit (in the SSC_RCMR and in the SSC_TCMR registers) is not performed on the next
frame. Transmission starts immediately regardless of the programming of the field STTDLY.
Problem Fix/Workaround
None.
When SSC is configured with the following conditions:
An unexpected delay of 2 or 3 system clock cycles is added to TD output.
Problem Fix/Workaround
None.
If the counter was stopped or disabled, unwanted Compare RA, RB or RC may occur at restart if
the clock selected by the counter is masked by a low selected burst input when the trigger event
is recognized at the selected clock active edge. All compare effects are affected, as the flags are
set incorrectly and CPC trigger, CPC stop or CPC disable may occur.
Problem Fix/Workaround
None.
A wrong 0 is captured in RA or RB during the last selected counter clock period if CPCTRG is
active and the capture event occurred at least one Master Clock cycle after the last counter
value update.
Problem Fix/Workaround
None.
The value captured is not equal to the Counter Value if the selected burst input is low at capture
time, i.e., at the selected clock active edge where the capture event is recognized.
The captured value may be 0; otherwise, it is the Counter Value plus one instead of the Counter
Value.
Problem Fix/Workaround
None.
• TCMR.STTDLY more than 0
• RCMR.START = Start on falling edge / Start on Rising edge / Start on any edge
• RFMR.FSOS = None (input)
• TCMR.START = Receive Start
AT91RM9200
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