AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 52

• Manufacturer Part Number: AT91RM9200-QU-002
• Description: IC ARM9 MCU 208 PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-QU-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Processor Series: AT91Rx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, UART, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 122
• Number Of Timers: 10 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
• Minimum Operating Temperature: - 40 C
• Eeprom Memory: 0 Bytes
• Input Output: 122
• Interface: EBI/EMI, UART/USART
• Ios: 122
• Memory Type: ROM
• Number Of Bits: 32
• Package Type: 208-pin PQFP
• Programmable Memory: 128K Bytes
• Timers: 3-16-bit
• Voltage, Range: 1.65-1.95 V
• Cpu Family: 91R
• Device Core: ARM920T
• Device Core Size: 32b
• Frequency (max): 180MHz
• Total Internal Ram Size: 16KB
• # I/os (max): 122
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.7.7
Access: Read/Write
The CP 15 Register 6, or Fault Address Register (FAR), contains the MVA (Modified Virtual Address) of the access being
attempted when the last fault occurred. The FAR is only updated for data faults, not for prefetch faults.
The ability to write to the FAR is provided to allow a debugger to restore a previous state.
• FAR[31:0]: Fault Address
On reading: returns the value of the FAR. The FAR holds the virtual address of the access which was attempted when fault
occurred.
On writing: sets the FAR to the value of the written data. This is useful for a debugger to restore the value of the FAR.
11.7.8
Access: Write-only
The CP15 Register 7, or Cache Operation Register, is used to manage the Instruction Cache (ICache) and the Data Cache
(DCache).
The function of each cache operation is selected by the opcode_2 and CRm fields in the MCR instruction used to write
CP15 Register 7.
Table 11-6.
52
Function
Wait for Interrupt
Invalidate ICache
Invalidate ICache single entry (using MVA)
Invalidate DCache
Invalidate DCache single entry (using MVA)
Invalidate ICache and DCache
Clean DCache singe entry (using MVA)
Clean DCache single entry (using index)
Drain write buffer
Prefetch ICache line (using MVA)
Clean and Invalidate DCache entry (using MVA)
Clean and Invalidate DCache entry (using index)
31
23
15
7
AT91RM9200
CP15 Register 6, Fault Address Register
CP15 Register 7, Cache Operation Register
Cache Functions
30
22
14
6
29
21
13
5
28
20
12
4
FAR
FAR
FAR
FAR
Data
SBZ
SBZ
MVA format
SBZ
MVA format
SBZ
MVA format
Index format
SBZ
MVA format
MVA format
Index format
27
19
11
3
26
18
10
2
CRm
c10
c10
c10
c13
c14
c14
c0
c5
c5
c6
c6
c7
25
17
9
1
1768I–ATARM–09-Jul-09
opcode_2
4
0
1
0
1
0
1
2
4
1
1
2
24
16
8
0
D