AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 157

IC ARM9 MCU 208 PQFP

AT91RM9200-QU-002

Manufacturer Part Number
AT91RM9200-QU-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-QU-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91Rx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, UART, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
122
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
122
Interface
EBI/EMI, UART/USART
Ios
122
Memory Type
ROM
Number Of Bits
32
Package Type
208-pin PQFP
Programmable Memory
128K Bytes
Timers
3-16-bit
Voltage, Range
1.65-1.95 V
Cpu Family
91R
Device Core
ARM920T
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
16KB
# I/os (max)
122
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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18.5
18.5.1
18.6
18.6.1
18.6.1.1
Figure 18-2. Case of an External Memory Smaller than Page Size
18.6.1.2
1768I–ATARM–09-Jul-09
Product Dependencies
Functional Description
I/O Lines
External Memory Interface
External Memory Mapping
Chip Select Lines
Memory
Map
The pins used for interfacing the Static Memory Controller may be multiplexed with the PIO
lines. The programmer must first program the PIO controller to assign the Static Memory Con-
troller pins to their peripheral function. If I/O lines of the Static Memory Controller are not used by
the application, they can be used for other purposes by the PIO Controller.
The memory map is defined by hardware and associates the internal 32-bit address space with
the external 23-bit address bus. Note that A[22:0] is only significant for 8-bit memory. A[22:1] is
used for 16-bit memory. If the physical memory device is smaller than the page size, it wraps
around and appears to be repeated within the page. The SMC correctly handles any valid
access to the memory device within the page. See
The Static Memory Controller provides up to eight chip select lines: NCS0 to NCS7.
1M Byte Device
1M Byte Device
1M Byte Device
1M Byte Device
Low
Low
Low
Low
Hi
Hi
Hi
Hi
Base + 4M Bytes
Base + 3M Bytes
Base + 2M Bytes
Base + 1M Byte
Base
Figure
18-2.
Repeat 3
Repeat 2
Repeat 1
AT91RM9200
157

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