T89C51CC01CA-7CTIM Atmel, T89C51CC01CA-7CTIM Datasheet - Page 62

• Manufacturer Part Number: T89C51CC01CA-7CTIM
• Description: IC 8051 MCU FLASH 32K 64BGA
• Manufacturer: Atmel
• Series: AT89C CANr

Specifications of T89C51CC01CA-7CTIM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-BGA
• For Use With: AT89STK-06 - KIT DEMOBOARD 8051 MCU W/CAN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: T89C51CC01CA7CTIM

Registers
62
A/T89C51CC01
Table 40. TCON Register
TCON (S:88h)
Timer/Counter Control Register
Reset Value = 0000 0000b
Number
TF1
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
TR1
TR1
TR0
TF1
TF0
Bit
IE1
IT1
IE0
IT0
6
Timer 1 Overflow Flag
Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on Timer/Counter overflow, when Timer 1 register overflows.
Timer 1 Run Control Bit
Clear to turn off Timer/Counter 1.
Set to turn on Timer/Counter 1.
Timer 0 Overflow Flag
Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on Timer/Counter overflow, when Timer 0 register overflows.
Timer 0 Run Control Bit
Clear to turn off Timer/Counter 0.
Set to turn on Timer/Counter 0.
Interrupt 1 Edge Flag
Cleared by hardware when interrupt is processed if edge-triggered (see IT1).
Set by hardware when external interrupt is detected on INT1# pin.
Interrupt 1 Type Control Bit
Clear to select low level active (level triggered) for external interrupt 1 (INT1#).
Set to select falling edge active (edge triggered) for external interrupt 1.
Interrupt 0 Edge Flag
Cleared by hardware when interrupt is processed if edge-triggered (see IT0).
Set by hardware when external interrupt is detected on INT0# pin.
Interrupt 0 Type Control Bit
Clear to select low level active (level triggered) for external interrupt 0 (INT0#).
Set to select falling edge active (edge triggered) for external interrupt 0.
TF0
5
TR0
4
IE1
3
IT1
2
IE0
1
4129N–CAN–03/08
IT0
0