T89C51CC01CA-7CTIM Atmel, T89C51CC01CA-7CTIM Datasheet - Page 105

• Manufacturer Part Number: T89C51CC01CA-7CTIM
• Description: IC 8051 MCU FLASH 32K 64BGA
• Manufacturer: Atmel
• Series: AT89C CANr

Specifications of T89C51CC01CA-7CTIM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-BGA
• For Use With: AT89STK-06 - KIT DEMOBOARD 8051 MCU W/CAN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: T89C51CC01CA7CTIM

4129N–CAN–03/08
Table 72. CANBT3 Register
CANBT3 (S:B6h)
CAN Bit Timing Registers 3
Note:
No default value after reset.
Number
Bit
6-4
3-1
7
-
7
0
The CAN controller bit timing registers must be accessed only if the CAN controller is dis-
abled with the ENA bit of the CANGCON register set to 0.
See Figure 48.
Bit Mnemonic Description
PHS2 2
PHS2 2:0
PHS1 2:0
SMP
6
-
PHS2 1
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Phase Segment 2
This phase is used to compensate for phase edge errors. This segment can
be shortened by the re-synchronization jump width.
Phase segment 2 is the maximum of Phase segment1 and the Information
Processing Time (= 2TQ).
Phase Segment 1
This phase is used to compensate for phase edge errors. This segment can
be lengthened by the re-synchronization jump width.
Sample Type
0 - once, at the sample point.
1 - three times, the threefold sampling of the bus is the sample point and twice
over a distance of a 1/2 period of the Tscl. The result corresponds to the
majority decision of the three values.
5
PHS2 0
4
Tphs2 = Tscl x (PHS2[2..0] + 1)
Tphs1 = Tscl x (PHS1[2..0] + 1)
PHS1 2
3
PHS1 1
2
PHS1 0
1
SMP
0
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