PIC18F25J10-I/SS Microchip Technology, PIC18F25J10-I/SS Datasheet - Page 96

IC PIC MCU FLASH 16KX16 28SSOP

PIC18F25J10-I/SS

Manufacturer Part Number
PIC18F25J10-I/SS
Description
IC PIC MCU FLASH 16KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F25J10-I/SS

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
21
Ram Memory Size
1KB
Cpu Speed
40MHz
No. Of Timers
3
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180011 - MODULE PLUG-IN 18F25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164331 - MODULE SKT FOR 28SSOP 18F45J10XLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F25J10-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F45J10 FAMILY
9.1.3
Though the V
these devices are still capable of interfacing with 5V
systems, even if the V
3.6V. This is accomplished by adding a pull-up resistor
to the port pin (Figure 9-2), clearing the LAT bit for that
pin and manipulating the corresponding TRIS bit
(Figure 9-1) to either allow the line to be pulled high or
to drive the pin low. Only port pins that are tolerant of
voltages up to 5.5V can be used for this type of
interface (refer to Section 9.1.2 “Input Pins and
Voltage Considerations”).
FIGURE 9-2:
EXAMPLE 9-1:
DS39682D-page 94
BCF
BCF
BCF
PIC18F45J10
LATD, 7
TRISD, 7 ; send a 0 to the 5V system
TRISD, 7 ; send a 1 to the 5V system
INTERFACING TO A 5V SYSTEM
RD7
DDMAX
; set up LAT register so
; changing TRIS bit will
; drive line low
of the PIC18F45J10 family is 3.6V,
IH
+5V SYSTEM HARDWARE
INTERFACE
COMMUNICATING WITH
THE +5V SYSTEM
of the target system is above
+5V
+5V Device
9.2
PORTA is a 5-bit wide, bidirectional port. The corre-
sponding Data Direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
high-impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
Reading the PORTA register reads the status of the
pins, whereas writing to it, will write to the port latch.
The Data Latch (LATA) register is also memory mapped.
Read-modify-write operations on the LATA register read
and write the latched output value for PORTA.
The other PORTA pins are multiplexed with analog
inputs, the analog V
parator voltage reference output. The operation of pins
RA3:RA0 and RA5 as A/D converter inputs is selected
by clearing or setting the control bits in the ADCON1
register (A/D Control Register 1).
Pins RA0 and RA3 may also be used as comparator
inputs and RA5 may be used as the C2 comparator
output by setting the appropriate bits in the CMCON
register. To use RA3:RA0 as digital inputs, it is also
necessary to turn off the comparators.
All PORTA pins have TTL input levels and full CMOS
output drivers.
The TRISA register controls the direction of the PORTA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 9-2:
CLRF
CLRF
MOVLW
MOVWF
MOVWF
MOVWF
MOVLW
MOVWF
Note:
PORTA, TRISA and LATA Registers
PORTA
LATA
07h
ADCON1
07h
CMCON
0CFh
TRISA
On a Power-on Reset, RA5 and RA3:RA0
are configured as analog inputs and read
as ‘0’.
REF
; Initialize PORTA by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Configure A/D
; for digital inputs
; Configure comparators
; for digital input
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA<5:4> as outputs
INITIALIZING PORTA
+ and V
© 2008 Microchip Technology Inc.
REF
- inputs and the com-

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