PIC18F25J10-I/SS Microchip Technology, PIC18F25J10-I/SS Datasheet - Page 235

IC PIC MCU FLASH 16KX16 28SSOP

PIC18F25J10-I/SS

Manufacturer Part Number
PIC18F25J10-I/SS
Description
IC PIC MCU FLASH 16KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F25J10-I/SS

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
21
Ram Memory Size
1KB
Cpu Speed
40MHz
No. Of Timers
3
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180011 - MODULE PLUG-IN 18F25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164331 - MODULE SKT FOR 28SSOP 18F45J10XLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F25J10-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
REGISTER 20-1:
REGISTER 20-2:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5
bit 4-1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-4
bit 3
bit 2
bit 1-0
Note 1:
R/WO-1
DEBUG
U-0
2:
(1)
The value of these bits in program memory should always be ‘1’. This ensures that the location is
executed as a NOP if it is accidentally executed.
This bit should always be maintained as ‘0’.
DEBUG: Background Debugger Enable bit
1 = Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins
0 = Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug
XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode enabled
0 = Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
STVREN: Stack Overflow/Underflow Reset Enable bit
1 = Reset on stack overflow/underflow enabled
0 = Reset on stack overflow/underflow disabled
Unimplemented: Read as ‘0’
WDTEN: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled (control is placed on SWDTEN bit)
Unimplemented: Read as ‘1’
Unimplemented: Read as ‘0’
CP0: Code Protection bit
1 = Program memory is not code-protected
0 = Program memory is code-protected
Unimplemented: Read as ‘0’
R/WO-1
XINST
U-0
(1)
CONFIG1L: CONFIGURATION REGISTER 1 LOW (BYTE ADDRESS 300000h)
CONFIG1H: CONFIGURATION REGISTER 1 HIGH (BYTE ADDRESS 300001h)
WO = Write-Once bit
WO = Write-Once bit
STVREN
R/WO-1
U-0
(1)
(1)
(2)
U-0
U-0
(1)
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
PIC18F45J10 FAMILY
U-0
U-0
(2)
R/WO-1
CP0
U-0
‘0’ = Bit is cleared
‘0’ = Bit is cleared
U-0
U-0
DS39682D-page 233
R/WO-1
WDTEN
U-0
bit 0
bit 0

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