PIC18F25J10-I/SS Microchip Technology, PIC18F25J10-I/SS Datasheet - Page 41

• Manufacturer Part Number: PIC18F25J10-I/SS
• Description: IC PIC MCU FLASH 16KX16 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F25J10-I/SS

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 21
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 21
• Ram Memory Size: 1KB
• Cpu Speed: 40MHz
• No. Of Timers: 3
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPIC, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Package: 28SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180011 - MODULE PLUG-IN 18F25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164331 - MODULE SKT FOR 28SSOP 18F45J10XLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

4.2
The MCLR pin provides a method for triggering a hard
external Reset of the device. A Reset is generated by
holding the pin low. PIC18 extended microcontroller
devices have a noise filter in the MCLR Reset path
which detects and ignores small pulses.
The MCLR pin is not driven low by any internal Resets,
including the WDT.
4.3
A Power-on Reset condition is generated on-chip
whenever V
allows the device to start in the initialized state when
V
To take advantage of the POR circuitry, tie the MCLR
pin through a resistor (1 kΩ to 10 kΩ) to V
eliminate external RC components usually needed to
create a Power-on Reset delay. A minimum rise rate for
V
time, see Figure 4-2.
When the device starts normal operation (i.e., exits the
Reset
(voltage, frequency, temperature, etc.) must be met to
ensure operation. If these conditions are not met, the
device must be held in Reset until the operating
conditions are met.
Power-on Reset events are captured by the POR bit
(RCON<1>). The state of the bit is set to ‘0’ whenever
a Power-on Reset occurs; it does not change for any
other Reset event. POR is not reset to ‘1’ by any
hardware event. To capture multiple events, the user
manually resets the bit to ‘1’ in software following any
Power-on Reset.
4.4
The PIC18F45J10 family of devices incorporates a
simple BOR function when the internal regulator is
enabled (ENVREG pin is tied to V
below V
T
or may not occur if V
T
V
Once a BOR has occurred, the Power-up Timer will
keep the chip in Reset for T
V
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be initialized. Once V
rises above V
additional time delay.
© 2008 Microchip Technology Inc.
BOR
BOR
DD
DD
DD
DD
is adequate for operation.
rises above V
. The chip will remain in Brown-out Reset until
drops below V
is specified (parameter D004). For a slow rise
(parameter 35) will reset the device. A Reset may
BOR
condition),
Master Clear (MCLR)
Power-on Reset (POR)
Brown-out Reset (BOR)
(PIC18F2XJ10/4XJ10 Devices Only)
DD
(parameter D005) for greater than time
BOR
rises above a certain threshold. This
, the Power-up Timer will execute the
BOR
BOR
DD
device
.
falls below V
while the Power-up Timer is
PWRT
operating
DD
). Any drop of V
(parameter 33). If
BOR
for less than
DD
parameters
. This will
DD
DD
PIC18F45J10 FAMILY
FIGURE 4-2:
4.4.1
The BOR bit always resets to ‘0’ on any Brown-out
Reset or Power-on Reset event. This makes it difficult
to determine if a Brown-out Reset event has occurred
just by reading the state of BOR alone. A more reliable
method is to simultaneously check the state of both
POR and BOR. This assumes that the POR bit is reset
to ‘1’ in software immediately after any Power-on Reset
event. If BOR is ‘0’ while POR is ‘1’, it can be reliably
assumed that a Brown-out Reset event has occurred.
In devices designated with an “LF” part number (such
as PIC18LF25J10), Brown-out Reset functionality is
disabled. In this case, the BOR bit cannot be used to
determine a Brown-out Reset event. The BOR bit is still
cleared by a Power-on Reset event.
Note 1: External Power-on Reset circuit is required
V
2: R < 40 kΩ is recommended to make sure that
3: R1 ≥ 1 kΩ will limit any current flowing into
DD
DETECTING BOR
D
only if the V
The diode D helps discharge the capacitor
quickly when V
the voltage drop across R does not violate
the device’s electrical specification.
MCLR from external capacitor C, in the event
of MCLR pin breakdown, due to Electrostatic
Discharge (ESD) or Electrical Overstress
(EOS).
V
DD
R
C
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
DD
DD
R1
power-up slope is too slow.
powers down.
DD
PIC18F45J10
MCLR
POWER-UP)
DS39682D-page 39