PIC18F25J10-I/SS Microchip Technology, PIC18F25J10-I/SS Datasheet - Page 352

• Manufacturer Part Number: PIC18F25J10-I/SS
• Description: IC PIC MCU FLASH 16KX16 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F25J10-I/SS

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 21
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 21
• Ram Memory Size: 1KB
• Cpu Speed: 40MHz
• No. Of Timers: 3
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPIC, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Package: 28SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180011 - MODULE PLUG-IN 18F25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164331 - MODULE SKT FOR 28SSOP 18F45J10XLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F45J10 FAMILY
INCF ................................................................................. 266
INCFSZ ............................................................................ 267
In-Circuit Debugger .......................................................... 243
In-Circuit Serial Programming (ICSP) ...................... 231, 243
Indexed Literal Offset Addressing
Indexed Literal Offset Mode ............................................. 292
Indirect Addressing ............................................................ 63
INFSNZ ............................................................................ 267
Initialization Conditions for All Registers ...................... 43–46
Instruction Cycle ................................................................. 52
Instruction Flow/Pipelining ................................................. 52
Instruction Set .................................................................. 245
DS39682D-page 350
Slave Mode .............................................................. 160
Sleep Operation ....................................................... 182
Stop Condition Timing .............................................. 181
and Standard PIC18 Instructions ............................. 292
Clocking Scheme ....................................................... 52
ADDLW .................................................................... 251
ADDWF .................................................................... 251
ADDWF (Indexed Literal Offset Mode) .................... 293
ADDWFC ................................................................. 252
ANDLW .................................................................... 252
ANDWF .................................................................... 253
BC ............................................................................ 253
BCF .......................................................................... 254
BN ............................................................................ 254
BNC ......................................................................... 255
BNN ......................................................................... 255
BNOV ....................................................................... 256
BNZ .......................................................................... 256
BOV ......................................................................... 259
BRA .......................................................................... 257
BSF .......................................................................... 257
BSF (Indexed Literal Offset Mode) .......................... 293
BTFSC ..................................................................... 258
BTFSS ..................................................................... 258
BTG .......................................................................... 259
BZ ............................................................................ 260
CALL ........................................................................ 260
CLRF ........................................................................ 261
CLRWDT .................................................................. 261
COMF ...................................................................... 262
CPFSEQ .................................................................. 262
CPFSGT .................................................................. 263
CPFSLT ................................................................... 263
DAW ......................................................................... 264
DCFSNZ .................................................................. 265
DECF ....................................................................... 264
DECFSZ ................................................................... 265
Extended Instruction Set .......................................... 287
General Format ........................................................ 247
GOTO ...................................................................... 266
INCF ......................................................................... 266
INCFSZ .................................................................... 267
INFSNZ .................................................................... 267
IORLW ..................................................................... 268
IORWF ..................................................................... 268
LFSR ........................................................................ 269
MOVF ....................................................................... 269
MOVFF .................................................................... 270
MOVLB .................................................................... 270
MOVLW ................................................................... 271
Addressing ....................................................... 160
Reception ......................................................... 162
Transmission .................................................... 162
INTCON Registers ............................................................. 81
Inter-Integrated Circuit. See I
Internal Oscillator Block ..................................................... 26
Internal RC Oscillator
Internet Address .............................................................. 357
Interrupt Sources ............................................................. 231
Interrupts ............................................................................ 79
Interrupts, Flag Bits
INTOSC, INTRC. See Internal Oscillator Block.
IORLW ............................................................................. 268
IORWF ............................................................................. 268
IPR Registers ..................................................................... 88
L
LFSR ................................................................................ 269
M
Master Clear (MCLR) ......................................................... 39
Master Synchronous Serial Port (MSSP). See MSSP.
Memory Organization ........................................................ 47
MOVWF ................................................................... 271
MULLW .................................................................... 272
MULWF .................................................................... 272
NEGF ....................................................................... 273
NOP ......................................................................... 273
Opcode Field Descriptions ....................................... 246
POP ......................................................................... 274
PUSH ....................................................................... 274
RCALL ..................................................................... 275
RESET ..................................................................... 275
RETFIE .................................................................... 276
RETLW .................................................................... 276
RETURN .................................................................. 277
RLCF ....................................................................... 277
RLNCF ..................................................................... 278
RRCF ....................................................................... 278
RRNCF .................................................................... 279
SETF ....................................................................... 279
SETF (Indexed Literal Offset Mode) ........................ 293
SLEEP ..................................................................... 280
Standard Instructions ............................................... 245
SUBFWB ................................................................. 280
SUBLW .................................................................... 281
SUBWF .................................................................... 281
SUBWFB ................................................................. 282
SWAPF .................................................................... 282
TBLRD ..................................................................... 283
TBLWT .................................................................... 284
TSTFSZ ................................................................... 285
XORLW ................................................................... 285
XORWF ................................................................... 286
Use with WDT .......................................................... 238
A/D Conversion Complete ....................................... 215
Capture Complete (CCP) ......................................... 125
Compare Complete (CCP) ....................................... 126
Interrupt-on-Change (RB7:RB4) ................................ 97
INTx Pin ..................................................................... 91
PORTB, Interrupt-on-Change .................................... 91
TMR0 ......................................................................... 91
TMR0 Overflow ........................................................ 113
TMR1 Overflow ........................................................ 115
TMR2-to-PR2 Match (PWM) ............................ 128, 133
Interrupt-on-Change (RB7:RB4) Flag
Data Memory ............................................................. 54
Program Memory ....................................................... 47
(RBIF Bit) ........................................................... 97
© 2008 Microchip Technology Inc.
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C Mode.