PIC18F25J10-I/SS Microchip Technology, PIC18F25J10-I/SS Datasheet - Page 144

IC PIC MCU FLASH 16KX16 28SSOP

PIC18F25J10-I/SS

Manufacturer Part Number
PIC18F25J10-I/SS
Description
IC PIC MCU FLASH 16KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F25J10-I/SS

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
21
Ram Memory Size
1KB
Cpu Speed
40MHz
No. Of Timers
3
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180011 - MODULE PLUG-IN 18F25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164331 - MODULE SKT FOR 28SSOP 18F45J10XLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F25J10-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F45J10 FAMILY
14.4.7.1
The auto-shutdown feature can be configured to allow
automatic restarts of the module following a shutdown
event. This is enabled by setting the PRSEN bit of the
ECCP1DEL register (ECCP1DEL<7>).
In Shutdown mode with PRSEN = 1 (Figure 14-10), the
ECCPASE bit will remain set for as long as the cause
of the shutdown continues. When the shutdown condi-
tion clears, the ECCPASE bit is cleared. If PRSEN = 0
(Figure 14-11), once a shutdown condition occurs, the
ECCPASE bit will remain set until it is cleared by firm-
ware. Once ECCPASE is cleared, the Enhanced PWM
will resume at the beginning of the next PWM period.
Independent of the PRSEN bit setting, if the auto-
shutdown source is one of the comparators, the
shutdown condition is a level. The ECCPASE bit
cannot be cleared as long as the cause of the shutdown
persists.
The Auto-Shutdown mode can be forced by writing a ‘1’
to the ECCPASE bit.
FIGURE 14-10:
FIGURE 14-11:
DS39682D-page 142
Note:
Shutdown
Shutdown
ECCPASE bit
PWM
ECCPASE bit
PWM
Writing to the ECCPASE bit is disabled
while a shutdown condition is active.
Auto-Shutdown and Automatic
Restart
Activity
Activity
Event
Event
PWM Period
PWM AUTO-SHUTDOWN (PRSEN = 1, AUTO-RESTART ENABLED)
PWM AUTO-SHUTDOWN (PRSEN = 0, AUTO-RESTART DISABLED)
PWM Period
Start of
Start of
Normal PWM
Normal PWM
Event Occurs
Event Occurs
PWM Period
PWM Period
Shutdown
Shutdown
14.4.8
When the ECCP module is used in the PWM mode, the
application hardware must use the proper external pull-
up and/or pull-down resistors on the PWM output pins.
When the microcontroller is released from Reset, all of
the I/O pins are in the high-impedance state. The
external circuits must keep the power switch devices in
the OFF state until the microcontroller drives the I/O
pins with the proper signal levels, or activates the PWM
output(s).
The CCP1M1:CCP1M0 bits (CCP1CON<1:0>) allow
the user to choose whether the PWM output signals are
active-high or active-low for each pair of PWM output
pins (P1A/P1C and P1B/P1D). The PWM output
polarities must be selected before the PWM pins are
configured as outputs. Changing the polarity configura-
tion while the PWM pins are configured as outputs is
not recommended, since it may result in damage to the
application circuits.
The P1A, P1B, P1C and P1D output latches may not be
in the proper states when the PWM module is initialized.
Enabling the PWM pins for output at the same time as
the ECCP module may cause damage to the applica-
tion circuit. The ECCP module must be enabled in the
proper output mode and complete a full PWM cycle
before configuring the PWM pins as outputs. The com-
pletion of a full PWM cycle is indicated by the TMR2IF
bit being set as the second PWM period begins.
Event Clears
Event Clears
Shutdown
Shutdown
START-UP CONSIDERATIONS
Cleared by
ECCPASE
Firmware
© 2008 Microchip Technology Inc.
Resumes
Resumes
PWM
PWM

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