PIC18F25J10-I/SS Microchip Technology, PIC18F25J10-I/SS Datasheet - Page 332

IC PIC MCU FLASH 16KX16 28SSOP

PIC18F25J10-I/SS

Manufacturer Part Number
PIC18F25J10-I/SS
Description
IC PIC MCU FLASH 16KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F25J10-I/SS

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
21
Ram Memory Size
1KB
Cpu Speed
40MHz
No. Of Timers
3
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180011 - MODULE PLUG-IN 18F25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164331 - MODULE SKT FOR 28SSOP 18F45J10XLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F25J10-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F45J10 FAMILY
TABLE 23-24: A/D CONVERTER CHARACTERISTICS: PIC18F24J10/25J10/44J10/45J10 (INDUSTRIAL)
FIGURE 23-20:
DS39682D-page 330
Param
A01
A03
A04
A06
A07
A10
A20
A21
A22
A25
A30
A50
Note 1:
No.
Note 1:
A/D DATA
SAMPLE
2:
3:
A/D CLK
ADRES
Symbol
N
E
E
E
E
ΔV
V
V
V
Z
I
BSF ADCON0, GO
REF
ADIF
REFH
REFL
AIN
AIN
IL
DL
OFF
GN
R
GO
REF
2:
The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
V
V
Maximum allowed impedance is 8.8 kΩ. This requires higher acquisition time than described in the A/D
chapter.
Q4
REFH
REFL
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
Resolution
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Monotonicity
Reference Voltage Range
(V
Reference Voltage High
Reference Voltage Low
Analog Input Voltage
Recommended Impedance of
Analog Voltage Source
V
current is from RA2/AN2/V
132
current is from RA3/AN3/V
REF
REFH
A/D CONVERSION TIMING
Input Current
– V
Characteristic
REFL
(Note 2)
)
9
(2)
8
REF
REF
OLD_DATA
- pin or V
7
+ pin or V
V
SS
. . .
SAMPLING STOPPED
V
Min
V
1.8
REFL
CY
– 0.3V
3
SS
SS
DD
is added before the A/D clock starts.
, whichever is selected as the V
, whichever is selected as the V
. . .
131
130
Guaranteed
Typ
2
(1)
V
1
DD
V
V
Max
<±1
<±1
<±3
<±3
150
REFH
REFH
2.2
10
– 3.0V
5
0
© 2008 Microchip Technology Inc.
Units
LSb ΔV
LSb ΔV
LSb ΔV
LSb ΔV
μA
μA
bit
V
V
V
V
V
REFL
REFH
ΔV
V
V
V
During V
During A/D conversion
cycle.
NEW_DATA
DONE
SS
DD
DD
source.
REF
REF
REF
REF
REF
source.
< 3.0V
≥ 3.0V
Conditions
T
V
CY
≥ 3.0V
≥ 3.0V
≥ 3.0V
≥ 3.0V
≥ 3.0V
AIN
AIN
acquisition.
V
REF

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