C8051F930DK Silicon Laboratories Inc, C8051F930DK Datasheet - Page 86

KIT DEV C8051F920,F921,F930,F931

C8051F930DK

Manufacturer Part Number
C8051F930DK
Description
KIT DEV C8051F920,F921,F930,F931
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F930DK

Contents
Target Board, Power Adapter, USB Debug Adapter, Cables, Batteries, and Software
Processor To Be Evaluated
C8051F930
Processor Series
C8051F9xx
Data Bus Width
8 bit
Interface Type
I2C, UART, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
0.9 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F920, F921, F930, F931
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1473

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F930DK
Manufacturer:
Silicon Labs
Quantity:
135
C8051F93x-C8051F92x
5.7.
The voltage reference MUX is configurable to use an externally connected voltage reference, one of two
internal voltage references, or one of two power supply voltages (see Figure 5.10). The ground reference
MUX allows the ground reference for ADC0 to be selected between the ground pin (GND) or a port pin
dedicated to analog ground (P0.1/AGND).
The voltage and ground reference options are configured using the REF0CN SFR described on page 88.
Electrical specifications are can be found in the Electrical Specifications Chapter.
Important Note About the V
inputs. When using an external voltage reference or the internal precision reference, P0.0/VREF should be
configured as an analog input and skipped by the Digital Crossbar. When using AGND as the ground
reference to ADC0, P0.1/AGND should be configured as an analog input and skipped by the Digital
Crossbar. Refer to Section “21. Port Input/Output” on page 212 for complete Port I/O configuration details.
The external reference voltage must be within the range 0  V
reference must be at the same DC voltage potential as GND.
86
4 .7 F
B ypass C apacitors
R ecom m ended
G N D
V D D
Voltage and Ground Reference Options
+
R 1
R eference
Figure 5.10. Voltage Reference Functional Block Diagram
E xternal
V oltage
C ircuit
0 .1 F
P 0.1/A G N D
P 0 .0/V R E F
V D D /D C +
REF
G N D
and AGND Inputs: Port pins are used as the external V
Internal 1.68V
R E F O E
R eference
E N
Rev. 1.1
R egulated D igital S upply
H igh S peed R eference
R E F 0C N
Internal 1.65 V
Internal 1.8V
REF
 VDD/DC+ and the external ground
E N
T em p S ensor
R E F G N D
00
01
10
11
0
1
REF
and AGND
(to A D C )
(to A D C )
V R E F
G round
Input
A D C
M ux

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