C8051F930DK Silicon Laboratories Inc, C8051F930DK Datasheet - Page 300

KIT DEV C8051F920,F921,F930,F931

C8051F930DK

Manufacturer Part Number
C8051F930DK
Description
KIT DEV C8051F920,F921,F930,F931
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F930DK

Contents
Target Board, Power Adapter, USB Debug Adapter, Cables, Batteries, and Software
Processor To Be Evaluated
C8051F930
Processor Series
C8051F9xx
Data Bus Width
8 bit
Interface Type
I2C, UART, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
0.9 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F920, F921, F930, F931
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1473

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F930DK
Manufacturer:
Silicon Labs
Quantity:
135
C8051F93x-C8051F92x
26. Programmable Counter Array
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer
and six 16-bit capture/compare modules. Each capture/compare module has its own associated I/O line
(CEXn) which is routed through the Crossbar to Port I/O when enabled. The counter/timer is driven by a
programmable timebase that can select between seven sources: system clock, system clock divided by
four, system clock divided by twelve, the external oscillator clock source divided by 8, SmaRTClock divided
by 8, Timer 0 overflows, or an external clock signal on the ECI input pin. Each capture/compare module
may be configured to operate independently in one of six modes: Edge-Triggered Capture, Software Timer,
High-Speed Output, Frequency Output, 8 to 11-Bit PWM, or 16-Bit PWM (each mode is described in
Section “26.3. Capture/Compare Modules” on page 303). The external oscillator clock option is ideal for
real-time clock (RTC) functionality, allowing the PCA to be clocked by a precision external oscillator while
the internal oscillator drives the system clock. The PCA is configured and controlled through the system
controller's Special Function Registers. The PCA block diagram is shown in Figure 26.1
Important Note: The PCA Module 5 may be used as a watchdog timer (WDT), and is enabled in this mode
following a system reset. Access to certain PCA registers is restricted while WDT mode is enabled .
See Section 26.4 for details.
300
Capture/Compare
Module 0
SYSCLK/12
Timer 0 Overflow
SYSCLK
External Clock/8
SYSCLK/4
ECI
Capture/Compare
Module 1
CLOCK
MUX
PCA
Figure 26.1. PCA Block Diagram
16-Bit Counter/Timer
Port I/O
Capture/Compare
Module 2
Crossbar
Rev. 1.1
Capture/Compare
Module 3
Capture/Compare
Module 4
Capture/Compare
Module 5 / WDT

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