C8051F930DK Silicon Laboratories Inc, C8051F930DK Datasheet - Page 81

KIT DEV C8051F920,F921,F930,F931

C8051F930DK

Manufacturer Part Number
C8051F930DK
Description
KIT DEV C8051F920,F921,F930,F931
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F930DK

Contents
Target Board, Power Adapter, USB Debug Adapter, Cables, Batteries, and Software
Processor To Be Evaluated
C8051F930
Processor Series
C8051F9xx
Data Bus Width
8 bit
Interface Type
I2C, UART, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
0.9 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F920, F921, F930, F931
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1473

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F930DK
Manufacturer:
Silicon Labs
Quantity:
135
5.5.
ADC0 on C8051F93x-C8051F92x has an analog multiplexer, referred to as AMUX0.
AMUX0 selects the positive inputs to the single-ended ADC0. Any of the following may be selected as the
positive input: Port I/O pins, the on-chip temperature sensor, the VBAT Power Supply, Regulated Digital
Supply Voltage (Output of VREG0), VDD/DC+ Supply, or the positive input may be connected to GND. The
ADC0 input channels are selected in the ADC0MX register described in SFR Definition 5.12.
Important Note About ADC0 Input Configuration: Port pins selected as ADC0 inputs should be
configured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for
analog input, set to 0 the corresponding bit in register PnMDIN and disable the digital driver (PnMDOUT =
0 and Port Latch = 1). To force the Crossbar to skip a Port pin, set to 1 the corresponding bit in register
PnSKIP. See Section “21. Port Input/Output” on page 212 for more Port I/O configuration details.
ADC0 Analog Multiplexer
Sensor
Sensor
Temp
Temp
Digital Supply
Digital Supply
VDD/DC+
VDD/DC+
P2.6*
P2.6*
P0.0
P0.0
VBAT
VBAT
Figure 5.7. ADC0 Multiplexer Block Diagram
*P1.7-P2.6 only available as
*P1.7-P2.6 only available as
inputs on 32-pin packages
inputs on 32-pin packages
ADC0MX
ADC0MX
AMUX
AMUX
Rev. 1.1
C8051F93x-C8051F92x
Gain = 0.5 or 1
Gain = 0.5 or 1
Programmable
Programmable
Attenuator
Attenuator
AIN+
AIN+
ADC0
ADC0
81

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