C8051F930DK Silicon Laboratories Inc, C8051F930DK Datasheet - Page 278

KIT DEV C8051F920,F921,F930,F931

C8051F930DK

Manufacturer Part Number
C8051F930DK
Description
KIT DEV C8051F920,F921,F930,F931
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F930DK

Contents
Target Board, Power Adapter, USB Debug Adapter, Cables, Batteries, and Software
Processor To Be Evaluated
C8051F930
Processor Series
C8051F9xx
Data Bus Width
8 bit
Interface Type
I2C, UART, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
0.9 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F920, F921, F930, F931
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1473

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F930DK
Manufacturer:
Silicon Labs
Quantity:
135
C8051F93x-C8051F92x
25. Timers
Each MCU includes four counter/timers: two are 16-bit counter/timers compatible with those found in the
standard 8051, and two are 16-bit auto-reload timer for use with the ADC, SMBus, or for general purpose
use. These timers can be used to measure time intervals, count external events and generate periodic
interrupt requests. Timer 0 and Timer 1 are nearly identical and have four primary modes of operation.
Timer 2 and Timer 3 offer 16-bit and split 8-bit timer functionality with auto-reload. Additionally, Timer 2 and
Timer 3 have a Capture Mode that can be used to measure the SmaRTClock or a Comparator period with
respect to another oscillator. This is particularly useful when using Capacitive Touch Switches. See Appli-
cation Note AN338 for details on Capacitive Touch Switch sensing.
Timers 0 and 1 may be clocked by one of five sources, determined by the Timer Mode Select bits (T1M –
T0M) and the Clock Scale bits (SCA1–SCA0). The Clock Scale bits define a pre-scaled clock from which
Timer 0 and/or Timer 1 may be clocked (See SFR Definition 25.1 for pre-scaled clock selection).
Timer 0/1 may then be configured to use this pre-scaled clock signal or the system clock. Timer 2 and
Timer 3 may be clocked by the system clock, the system clock divided by 12. Timer 2 may additionally be
clocked by the SmaRTClock divided by 8 or the Comparator0 output. Timer 3 may additionally be clocked
by the external oscillator clock source divided by 8 or the Comparator1 output.
Timer 0 and Timer 1 may also be operated as counters. When functioning as a counter, a counter/timer
register is incremented on each high-to-low transition at the selected input pin (T0 or T1). Events with a fre-
quency of up to one-fourth the system clock frequency can be counted. The input signal need not be peri-
odic, but it should be held at a given level for at least two full system clock cycles to ensure the level is
properly sampled.
278
Two 8-bit counter/timers (Timer 0
Timer 0 and Timer 1 Modes:
8-bit counter/timer with auto-
13-bit counter/timer
16-bit counter/timer
reload
only)
Two 8-bit timers with auto-reload
16-bit timer with auto-reload
Timer 2 Modes:
Rev. 1.1
Two 8-bit timers with auto-reload
16-bit timer with auto-reload
Timer 3 Modes:

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