mc68hc908kx8 Freescale Semiconductor, Inc, mc68hc908kx8 Datasheet - Page 50

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mc68hc908kx8

Manufacturer Part Number
mc68hc908kx8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Configuration Register (CONFIG)
LVIPWRD — LVI Power Disable Bit
LVI5OR3 — LVI 5-V or 3-V Operating Mode Bit
SSREC — Short Stop Recovery Bit
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
50
LVIPWRD disables the LVI module. See
LVI5OR3 selects the voltage operating mode of the LVI module (see See
Inhibit
Electrical Specifications
SSREC enables the CPU to exit stop mode with a delay of 32 CGMXCLK cycles instead of a
4096-CGMXCLK cycle delay.
If the system clock source selected is the internal oscillator or the external crystal and the
OSCENINSTOP configuration bit is not set, the oscillator will be disabled during stop mode. The short
stop recovery does not provide enough time for oscillator stabilization and thus the SSREC bit should
not be set.
When using the LVI during normal operation but disabling during stop mode, the LVI will have an
enable time of t
CGMXCLK cycles) gives a delay longer than the LVI enable time for these startup scenarios. There is
no period where the MCU is not protected from a low-power condition. However, when using the short
stop recovery configuration option, the 32-CGMXCLK delay must be greater than the LVI’s turn on time
to avoid a period in startup where the LVI is not protecting the MCU.
STOP enables the STOP instruction.
COPD disables the COP module. See
1 = LVI module power disabled
0 = LVI module power enabled
1 = LVI operates in 5-V mode.
0 = LVI operates in 3-V mode.
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLCK cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
(LVI).). The voltage mode selected for the LVI should match the operating V
The LVI5OR3 bit is cleared by a power-on reset (POR) only. Other resets
will leave this bit unaffected.
Exiting stop mode by an LVI reset will result in the long stop recovery.
EN
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
. The system stabilization time for power-on reset and long stop recovery (both 4096
for the LVI’s voltage trip points for each of the modes.
Chapter 5 Computer Operating Properly Module
Chapter 10 Low-Voltage Inhibit
NOTE
NOTE
(LVI).
Chapter 10 Low-Voltage
Freescale Semiconductor
DD
. See
(COP).
Chapter 17

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