mc68hc908kx8 Freescale Semiconductor, Inc, mc68hc908kx8 Datasheet - Page 169

no-image

mc68hc908kx8

Manufacturer Part Number
mc68hc908kx8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mc68hc908kx8CDW
Manufacturer:
FSC
Quantity:
364
Part Number:
mc68hc908kx8CDW
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
mc68hc908kx8CDWE
Manufacturer:
FREESCALE
Quantity:
20 000
Company:
Part Number:
mc68hc908kx8CDWE
Quantity:
588
Part Number:
mc68hc908kx8MDWE
Manufacturer:
MOT
Quantity:
6 238
Company:
Part Number:
mc68hc908kx8VP
Quantity:
13
Chapter 16
Development Support
16.1 Introduction
This section describes the break module, the monitor read-only memory (MON), and the monitor mode
entry methods.
16.2 Break Module (BRK)
The break module can generate a break interrupt that stops normal program flow at a defined address to
enter a background program.
Features include:
16.2.1 Functional Description
When the internal address bus matches the value written in the break address registers, the break module
issues a breakpoint signal to the CPU. The CPU then loads the instruction register with a software
interrupt instruction (SWI) after completion of the current CPU instruction. The program counter vectors
to $FFFC and $FFFD ($FEFC and $FEFD in monitor mode).
These events can cause a break interrupt to occur:
When a CPU-generated address matches the contents of the break address registers, the break interrupt
begins after the CPU completes its current instruction. A return-from-interrupt instruction (RTI) in the
break routine ends the break interrupt and returns the MCU to normal operation.
structure of the break module.
16.2.1.1 Flag Protection During Break Interrupts
The BCFE bit in the SIM break flag control register (SBFCR) enables software to clear status bits during
the break state.
Freescale Semiconductor
Accessible input/output (I/O) registers during the break interrupt
Central processor unit (CPU) generated break interrupts
Software generated break interrupts
Computer operating properly (COP) disabling during break interrupts
A CPU-generated address (the address in the program counter) matches the contents of the break
address registers.
Software writes a 1 to the BRKA bit in the break status and control register.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
Figure 16-1
shows the
169

Related parts for mc68hc908kx8