mc68hc908kx8 Freescale Semiconductor, Inc, mc68hc908kx8 Datasheet - Page 106

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mc68hc908kx8

Manufacturer Part Number
mc68hc908kx8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Input/Output (I/O) Ports (PORTS)
11.2 Port A
Port A is a 5-bit special function port on the MC68HC908KX8 that shares all of its pins with the keyboard
interrupt module (KBI) and the 2-channel timer. Port A contains software programmable pullup resistors
enabled when a port pin is used as a general-function input. Port A pins are also high-current port pins
with 15-mA source/15-mA sink capabilities.
11.2.1 Port A Data Register
The port A data register (PTA) contains a data latch for each of the five port A pins.
PTA4–PTA0 — Port A Data Bits
KBD4–KBD0 — Keyboard Wakeup Bits
TCH1 and TCH0 — Timer Channel I/O Bits
11.2.2 Data Direction Register A
Data direction register A (DDRA) determines whether each port A pin is an input or an output. Writing a 1
to a DDRA bit enables the output buffer for the corresponding port A pin; a 0 disables the output buffer.
106
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
The keyboard interrupt enable bits, KBIE4–KBIE0, in the keyboard interrupt control register, enable
the port A pins as external interrupt pins. See
The PTA3/KBD3/TCH1 and PTA2/KBD2/TCH0 pins are the TIM input capture/output compare pins.
The edge/level select bits, ELSxB and ELSxA, determine whether the pins are timer channel I/O pins
or general-purpose I/O pins. See
Alternate Function:
Alternate Function:
Address: $0004
Reset:
Read:
Write:
Address:
Reset:
Read:
Write:
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
Bit 7
0
0
$0000
Bit 7
Figure 11-3. Data Direction Register A (DDRA)
0
= Unimplemented
Figure 11-2. Port A Data Register (PTA)
= Unimplemented
6
0
0
6
0
Chapter 9 Keyboard Interrupt Module
5
0
0
5
0
Chapter 9 Keyboard Interrupt Module
DDRA4
4
0
VREFH
Unaffected by reset
KBD4
PTA4
4
DDRA3
3
0
KBD3
TCH1
PTA3
3
DDRA2
2
0
KBD2
TCH0
PTA2
2
(KBI).
DDRA1
1
0
KBD1
PTA1
1
Freescale Semiconductor
DDRA0
Bit 0
(KBI).
0
KBD0
PTA0
Bit 0

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